Commit 0fb1f35e authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD 



Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent cfd9d70a

arch/arc/mm/tlbex.S

+10 −0
Original line number Diff line number Diff line
@@ -122,17 +122,27 @@ ex_saved_reg1: 
#else	/* ARCv2 */



.macro TLBMISS_FREEUP_REGS

#ifdef CONFIG_ARC_HAS_LL64

	std   r0, [sp, -16]

	std   r2, [sp, -8]

#else

	PUSH  r0

	PUSH  r1

	PUSH  r2

	PUSH  r3

#endif

.endm



.macro TLBMISS_RESTORE_REGS

#ifdef CONFIG_ARC_HAS_LL64

	ldd   r0, [sp, -16]

	ldd   r2, [sp, -8]

#else

	POP   r3

	POP   r2

	POP   r1

	POP   r0

#endif

.endm



#endif