Unverified Commit 0fd31910 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt64-5.17' of... 

Merge tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.17

1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
   E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
   of USI node.

* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  dt-bindings: arm: samsung: document jackpotlte board binding
  dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
  arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
  dt-bindings: soc: samsung: Add Exynos USI bindings
  arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7

Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d07156eb 51b1a572

Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml

+12 −0
Original line number Diff line number Diff line
@@ -199,6 +199,18 @@ properties: 
              - samsung,exynos7-espresso        # Samsung Exynos7 Espresso

          - const: samsung,exynos7



      - description: Exynos7885 based boards

        items:

          - enum:

              - samsung,jackpotlte              # Samsung Galaxy A8 (2018)

          - const: samsung,exynos7885



      - description: Exynos850 based boards

        items:

          - enum:

              - winlink,e850-96                 # WinLink E850-96

          - const: samsung,exynos850



      - description: Exynos Auto v9 based boards

        items:

          - enum:

Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml

0 → 100644
+159 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Samsung's Exynos USI (Universal Serial Interface) binding



maintainers:

  - Sam Protsenko <semen.protsenko@linaro.org>

  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>



description: |

  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).

  USI shares almost all internal circuits within each protocol, so only one

  protocol can be chosen at a time. USI is modeled as a node with zero or more

  child nodes, each representing a serial sub-node device. The mode setting

  selects which particular function will be used.



  Refer to next bindings documentation for information on protocol subnodes that

  can exist under USI node:



  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml

  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt

  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt



properties:

  $nodename:

    pattern: "^usi@[0-9a-f]+$"



  compatible:

    enum:

      - samsung,exynos850-usi   # for USIv2 (Exynos850, ExynosAutoV9)



  reg: true



  clocks: true



  clock-names: true



  ranges: true



  "#address-cells":

    const: 1



  "#size-cells":

    const: 1



  samsung,sysreg:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    description:

      Should be phandle/offset pair. The phandle to System Register syscon node

      (for the same domain where this USI controller resides) and the offset

      of SW_CONF register for this USI controller.



  samsung,mode:

    $ref: /schemas/types.yaml#/definitions/uint32

    description:

      Selects USI function (which serial protocol to use). Refer to

      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.



  samsung,clkreq-on:

    type: boolean

    description:

      Enable this property if underlying protocol requires the clock to be

      continuously provided without automatic gating. As suggested by SoC

      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C

      multi-master mode. Usually this property is needed if USI mode is set

      to "UART".



      This property is optional.



patternProperties:

  # All other properties should be child nodes

  "^(serial|spi|i2c)@[0-9a-f]+$":

    type: object

    description: Child node describing underlying USI serial protocol



required:

  - compatible

  - ranges

  - "#address-cells"

  - "#size-cells"

  - samsung,sysreg

  - samsung,mode



if:

  properties:

    compatible:

      contains:

        enum:

          - samsung,exynos850-usi



then:

  properties:

    reg:

      maxItems: 1



    clocks:

      items:

        - description: Bus (APB) clock

        - description: Operating clock for UART/SPI/I2C protocol



    clock-names:

      items:

        - const: pclk

        - const: ipclk



  required:

    - reg

    - clocks

    - clock-names



else:

  properties:

    reg: false

    clocks: false

    clock-names: false

    samsung,clkreq-on: false



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/soc/samsung,exynos-usi.h>



    usi0: usi@138200c0 {

        compatible = "samsung,exynos850-usi";

        reg = <0x138200c0 0x20>;

        samsung,sysreg = <&sysreg_peri 0x1010>;

        samsung,mode = <USI_V2_UART>;

        samsung,clkreq-on; /* needed for UART mode */

        #address-cells = <1>;

        #size-cells = <1>;

        ranges;

        clocks = <&cmu_peri 32>, <&cmu_peri 31>;

        clock-names = "pclk", "ipclk";



        serial_0: serial@13820000 {

            compatible = "samsung,exynos850-uart";

            reg = <0x13820000 0xc0>;

            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;

            clocks = <&cmu_peri 32>, <&cmu_peri 31>;

            clock-names = "uart", "clk_uart_baud0";

            status = "disabled";

        };



        hsi2c_0: i2c@13820000 {

            compatible = "samsung,exynosautov9-hsi2c";

            reg = <0x13820000 0xc0>;

            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;

            #address-cells = <1>;

            #size-cells = <0>;

            clocks = <&cmu_peri 31>, <&cmu_peri 32>;

            clock-names = "hsi2c", "hsi2c_pclk";

            status = "disabled";

        };

    };

Documentation/devicetree/bindings/vendor-prefixes.yaml

+2 −0
Original line number Diff line number Diff line
@@ -1322,6 +1322,8 @@ patternProperties: 
    description: Wiligear, Ltd.

  "^winbond,.*":

    description: Winbond Electronics corp.

  "^winlink,.*":

    description: WinLink Co., Ltd

  "^winstar,.*":

    description: Winstar Display Corp.

  "^wits,.*":

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -1585,7 +1585,7 @@ pwm: pwm@14dd0000 { 
			status = "disabled";

		};



		hsi2c_0: hsi2c@14e40000 {

		hsi2c_0: i2c@14e40000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e40000 0x1000>;

			interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>;
@@ -1598,7 +1598,7 @@ hsi2c_0: hsi2c@14e40000 { 
			status = "disabled";

		};



		hsi2c_1: hsi2c@14e50000 {

		hsi2c_1: i2c@14e50000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e50000 0x1000>;

			interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
@@ -1611,7 +1611,7 @@ hsi2c_1: hsi2c@14e50000 { 
			status = "disabled";

		};



		hsi2c_2: hsi2c@14e60000 {

		hsi2c_2: i2c@14e60000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e60000 0x1000>;

			interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
@@ -1624,7 +1624,7 @@ hsi2c_2: hsi2c@14e60000 { 
			status = "disabled";

		};



		hsi2c_3: hsi2c@14e70000 {

		hsi2c_3: i2c@14e70000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e70000 0x1000>;

			interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
@@ -1637,7 +1637,7 @@ hsi2c_3: hsi2c@14e70000 { 
			status = "disabled";

		};



		hsi2c_4: hsi2c@14ec0000 {

		hsi2c_4: i2c@14ec0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14ec0000 0x1000>;

			interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
@@ -1650,7 +1650,7 @@ hsi2c_4: hsi2c@14ec0000 { 
			status = "disabled";

		};



		hsi2c_5: hsi2c@14ed0000 {

		hsi2c_5: i2c@14ed0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14ed0000 0x1000>;

			interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
@@ -1663,7 +1663,7 @@ hsi2c_5: hsi2c@14ed0000 { 
			status = "disabled";

		};



		hsi2c_6: hsi2c@14ee0000 {

		hsi2c_6: i2c@14ee0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14ee0000 0x1000>;

			interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
@@ -1676,7 +1676,7 @@ hsi2c_6: hsi2c@14ee0000 { 
			status = "disabled";

		};



		hsi2c_7: hsi2c@14ef0000 {

		hsi2c_7: i2c@14ef0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14ef0000 0x1000>;

			interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
@@ -1689,7 +1689,7 @@ hsi2c_7: hsi2c@14ef0000 { 
			status = "disabled";

		};



		hsi2c_8: hsi2c@14d90000 {

		hsi2c_8: i2c@14d90000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14d90000 0x1000>;

			interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
@@ -1702,7 +1702,7 @@ hsi2c_8: hsi2c@14d90000 { 
			status = "disabled";

		};



		hsi2c_9: hsi2c@14da0000 {

		hsi2c_9: i2c@14da0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14da0000 0x1000>;

			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
@@ -1715,7 +1715,7 @@ hsi2c_9: hsi2c@14da0000 { 
			status = "disabled";

		};



		hsi2c_10: hsi2c@14de0000 {

		hsi2c_10: i2c@14de0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14de0000 0x1000>;

			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
@@ -1728,7 +1728,7 @@ hsi2c_10: hsi2c@14de0000 { 
			status = "disabled";

		};



		hsi2c_11: hsi2c@14df0000 {

		hsi2c_11: i2c@14df0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14df0000 0x1000>;

			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;

arch/arm64/boot/dts/exynos/exynos7.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -359,7 +359,7 @@ pinctrl_bus1: pinctrl@14870000 { 
			interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;

		};



		hsi2c_0: hsi2c@13640000 {

		hsi2c_0: i2c@13640000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13640000 0x1000>;

			interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
@@ -372,7 +372,7 @@ hsi2c_0: hsi2c@13640000 { 
			status = "disabled";

		};



		hsi2c_1: hsi2c@13650000 {

		hsi2c_1: i2c@13650000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13650000 0x1000>;

			interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
@@ -385,7 +385,7 @@ hsi2c_1: hsi2c@13650000 { 
			status = "disabled";

		};



		hsi2c_2: hsi2c@14e60000 {

		hsi2c_2: i2c@14e60000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e60000 0x1000>;

			interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
@@ -398,7 +398,7 @@ hsi2c_2: hsi2c@14e60000 { 
			status = "disabled";

		};



		hsi2c_3: hsi2c@14e70000 {

		hsi2c_3: i2c@14e70000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e70000 0x1000>;

			interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
@@ -411,7 +411,7 @@ hsi2c_3: hsi2c@14e70000 { 
			status = "disabled";

		};



		hsi2c_4: hsi2c@13660000 {

		hsi2c_4: i2c@13660000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13660000 0x1000>;

			interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
@@ -424,7 +424,7 @@ hsi2c_4: hsi2c@13660000 { 
			status = "disabled";

		};



		hsi2c_5: hsi2c@13670000 {

		hsi2c_5: i2c@13670000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13670000 0x1000>;

			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
@@ -437,7 +437,7 @@ hsi2c_5: hsi2c@13670000 { 
			status = "disabled";

		};



		hsi2c_6: hsi2c@14e00000 {

		hsi2c_6: i2c@14e00000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e00000 0x1000>;

			interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
@@ -450,7 +450,7 @@ hsi2c_6: hsi2c@14e00000 { 
			status = "disabled";

		};



		hsi2c_7: hsi2c@13e10000 {

		hsi2c_7: i2c@13e10000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13e10000 0x1000>;

			interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
@@ -463,7 +463,7 @@ hsi2c_7: hsi2c@13e10000 { 
			status = "disabled";

		};



		hsi2c_8: hsi2c@14e20000 {

		hsi2c_8: i2c@14e20000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x14e20000 0x1000>;

			interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
@@ -476,7 +476,7 @@ hsi2c_8: hsi2c@14e20000 { 
			status = "disabled";

		};



		hsi2c_9: hsi2c@13680000 {

		hsi2c_9: i2c@13680000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13680000 0x1000>;

			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
@@ -489,7 +489,7 @@ hsi2c_9: hsi2c@13680000 { 
			status = "disabled";

		};



		hsi2c_10: hsi2c@13690000 {

		hsi2c_10: i2c@13690000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x13690000 0x1000>;

			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
@@ -502,7 +502,7 @@ hsi2c_10: hsi2c@13690000 { 
			status = "disabled";

		};



		hsi2c_11: hsi2c@136a0000 {

		hsi2c_11: i2c@136a0000 {

			compatible = "samsung,exynos7-hsi2c";

			reg = <0x136a0000 0x1000>;

			interrupts = <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>;