Commit 10ed2b11 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/cpu' into perf/core, to pick up dependent commits 



We are going to fix perf-events fallout of changes in tip:x86/cpu,
so merge in that branch first.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 690ca3a3 2eda374e

arch/x86/events/intel/cstate.c

+72 −72
Original line number Diff line number Diff line
@@ -696,78 +696,78 @@ static const struct cstate_model srf_cstates __initconst = { 




static const struct x86_cpu_id intel_cstates_match[] __initconst = {

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&nhm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&nhm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&nhm_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&nhm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&nhm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&nhm_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&snb_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&snb_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&snb_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&hswult_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,	&slm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D,	&slm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,	&slm_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&snb_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&snb_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&snb_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&hswult_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&hswult_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&hswult_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&hswult_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L,	&cnl_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&knl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&knl_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	&glm_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	&srf_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,	&grr_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	&icx_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D,	&icx_cstates),



	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&icl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&adl_cstates),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&adl_cstates),

	X86_MATCH_VFM(INTEL_NEHALEM,		&nhm_cstates),

	X86_MATCH_VFM(INTEL_NEHALEM_EP,		&nhm_cstates),

	X86_MATCH_VFM(INTEL_NEHALEM_EX,		&nhm_cstates),



	X86_MATCH_VFM(INTEL_WESTMERE,		&nhm_cstates),

	X86_MATCH_VFM(INTEL_WESTMERE_EP,	&nhm_cstates),

	X86_MATCH_VFM(INTEL_WESTMERE_EX,	&nhm_cstates),



	X86_MATCH_VFM(INTEL_SANDYBRIDGE,	&snb_cstates),

	X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,	&snb_cstates),



	X86_MATCH_VFM(INTEL_IVYBRIDGE,		&snb_cstates),

	X86_MATCH_VFM(INTEL_IVYBRIDGE_X,	&snb_cstates),



	X86_MATCH_VFM(INTEL_HASWELL,		&snb_cstates),

	X86_MATCH_VFM(INTEL_HASWELL_X,		&snb_cstates),

	X86_MATCH_VFM(INTEL_HASWELL_G,		&snb_cstates),



	X86_MATCH_VFM(INTEL_HASWELL_L,		&hswult_cstates),



	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT,	&slm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D,	&slm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_AIRMONT,	&slm_cstates),



	X86_MATCH_VFM(INTEL_BROADWELL,		&snb_cstates),

	X86_MATCH_VFM(INTEL_BROADWELL_D,	&snb_cstates),

	X86_MATCH_VFM(INTEL_BROADWELL_G,	&snb_cstates),

	X86_MATCH_VFM(INTEL_BROADWELL_X,	&snb_cstates),



	X86_MATCH_VFM(INTEL_SKYLAKE_L,		&snb_cstates),

	X86_MATCH_VFM(INTEL_SKYLAKE,		&snb_cstates),

	X86_MATCH_VFM(INTEL_SKYLAKE_X,		&snb_cstates),



	X86_MATCH_VFM(INTEL_KABYLAKE_L,		&hswult_cstates),

	X86_MATCH_VFM(INTEL_KABYLAKE,		&hswult_cstates),

	X86_MATCH_VFM(INTEL_COMETLAKE_L,	&hswult_cstates),

	X86_MATCH_VFM(INTEL_COMETLAKE,		&hswult_cstates),



	X86_MATCH_VFM(INTEL_CANNONLAKE_L,	&cnl_cstates),



	X86_MATCH_VFM(INTEL_XEON_PHI_KNL,	&knl_cstates),

	X86_MATCH_VFM(INTEL_XEON_PHI_KNM,	&knl_cstates),



	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_TREMONT,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_TREMONT_L,	&glm_cstates),

	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,	&adl_cstates),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,	&srf_cstates),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,	&grr_cstates),



	X86_MATCH_VFM(INTEL_ICELAKE_L,		&icl_cstates),

	X86_MATCH_VFM(INTEL_ICELAKE,		&icl_cstates),

	X86_MATCH_VFM(INTEL_ICELAKE_X,		&icx_cstates),

	X86_MATCH_VFM(INTEL_ICELAKE_D,		&icx_cstates),

	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,	&icx_cstates),

	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,	&icx_cstates),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,	&icx_cstates),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,	&icx_cstates),



	X86_MATCH_VFM(INTEL_TIGERLAKE_L,	&icl_cstates),

	X86_MATCH_VFM(INTEL_TIGERLAKE,		&icl_cstates),

	X86_MATCH_VFM(INTEL_ROCKETLAKE,		&icl_cstates),

	X86_MATCH_VFM(INTEL_ALDERLAKE,		&adl_cstates),

	X86_MATCH_VFM(INTEL_ALDERLAKE_L,	&adl_cstates),

	X86_MATCH_VFM(INTEL_RAPTORLAKE,		&adl_cstates),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,	&adl_cstates),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,	&adl_cstates),

	X86_MATCH_VFM(INTEL_METEORLAKE,		&adl_cstates),

	X86_MATCH_VFM(INTEL_METEORLAKE_L,	&adl_cstates),

	{ },

};

MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);

arch/x86/events/intel/lbr.c

+2 −1
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#include <linux/perf_event.h>

#include <linux/types.h>



#include <asm/cpu_device_id.h>

#include <asm/perf_event.h>

#include <asm/msr.h>
@@ -1457,7 +1458,7 @@ void __init intel_pmu_lbr_init_atom(void) 
	 * to have an operational LBR which can freeze

	 * on PMU interrupt

	 */

	if (boot_cpu_data.x86_model == 28

	if (boot_cpu_data.x86_vfm == INTEL_ATOM_BONNELL

	    && boot_cpu_data.x86_stepping < 10) {

		pr_cont("LBR disabled due to erratum");

		return;

arch/x86/events/intel/pt.c

+6 −6
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
#include <asm/insn.h>

#include <asm/io.h>

#include <asm/intel_pt.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>



#include "../perf_event.h"

#include "pt.h"
@@ -211,11 +211,11 @@ static int __init pt_pmu_hw_init(void) 
	}



	/* model-specific quirks */

	switch (boot_cpu_data.x86_model) {

	case INTEL_FAM6_BROADWELL:

	case INTEL_FAM6_BROADWELL_D:

	case INTEL_FAM6_BROADWELL_G:

	case INTEL_FAM6_BROADWELL_X:

	switch (boot_cpu_data.x86_vfm) {

	case INTEL_BROADWELL:

	case INTEL_BROADWELL_D:

	case INTEL_BROADWELL_G:

	case INTEL_BROADWELL_X:

		/* not setting BRANCH_EN will #GP, erratum BDM106 */

		pt_pmu.branch_en_always_on = true;

		break;

arch/x86/events/intel/uncore.c

+50 −50
Original line number Diff line number Diff line
@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = { 
};



static const struct x86_cpu_id intel_uncore_match[] __initconst = {

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,		&nhm_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,		&snb_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,		&ivb_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,		&hsw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,		&bdw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,		&bdw_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,	&snbep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,		&nhmex_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,		&nhmex_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,		&ivbep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,		&hswep_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,		&bdx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,		&bdx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,	&knl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,	&knl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,		&skx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&skl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI,	&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE,		&icl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		&icx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&icx_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&tgl_l_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&tgl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,		&rkl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,		&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE,		&mtl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,	&mtl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,	&spr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,	&spr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	&snr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,	&adl_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,	&gnr_uncore_init),

	X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM_EP,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE,		&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE_EP,	&nhm_uncore_init),

	X86_MATCH_VFM(INTEL_SANDYBRIDGE,	&snb_uncore_init),

	X86_MATCH_VFM(INTEL_IVYBRIDGE,		&ivb_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_L,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_G,		&hsw_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL,		&bdw_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_G,	&bdw_uncore_init),

	X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,	&snbep_uncore_init),

	X86_MATCH_VFM(INTEL_NEHALEM_EX,		&nhmex_uncore_init),

	X86_MATCH_VFM(INTEL_WESTMERE_EX,	&nhmex_uncore_init),

	X86_MATCH_VFM(INTEL_IVYBRIDGE_X,	&ivbep_uncore_init),

	X86_MATCH_VFM(INTEL_HASWELL_X,		&hswep_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_X,	&bdx_uncore_init),

	X86_MATCH_VFM(INTEL_BROADWELL_D,	&bdx_uncore_init),

	X86_MATCH_VFM(INTEL_XEON_PHI_KNL,	&knl_uncore_init),

	X86_MATCH_VFM(INTEL_XEON_PHI_KNM,	&knl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE_L,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_SKYLAKE_X,		&skx_uncore_init),

	X86_MATCH_VFM(INTEL_KABYLAKE_L,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_KABYLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_COMETLAKE_L,	&skl_uncore_init),

	X86_MATCH_VFM(INTEL_COMETLAKE,		&skl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_L,		&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_NNPI,	&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE,		&icl_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_D,		&icx_uncore_init),

	X86_MATCH_VFM(INTEL_ICELAKE_X,		&icx_uncore_init),

	X86_MATCH_VFM(INTEL_TIGERLAKE_L,	&tgl_l_uncore_init),

	X86_MATCH_VFM(INTEL_TIGERLAKE,		&tgl_uncore_init),

	X86_MATCH_VFM(INTEL_ROCKETLAKE,		&rkl_uncore_init),

	X86_MATCH_VFM(INTEL_ALDERLAKE,		&adl_uncore_init),

	X86_MATCH_VFM(INTEL_ALDERLAKE_L,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE,		&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_P,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_RAPTORLAKE_S,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_METEORLAKE,		&mtl_uncore_init),

	X86_MATCH_VFM(INTEL_METEORLAKE_L,	&mtl_uncore_init),

	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,	&spr_uncore_init),

	X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,	&spr_uncore_init),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_X,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_GRANITERAPIDS_D,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,	&snr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,	&adl_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,	&gnr_uncore_init),

	X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,	&gnr_uncore_init),

	{},

};

MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);

arch/x86/events/intel/uncore_nhmex.c

+2 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* Nehalem-EX/Westmere-EX uncore support */

#include <asm/cpu_device_id.h>

#include "uncore.h"



/* NHM-EX event control */
@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = { 


void nhmex_uncore_cpu_init(void)

{

	if (boot_cpu_data.x86_model == 46)

	if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)

		uncore_nhmex = true;

	else

		nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;