Commit 11148102 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles 



Expand qcom,sm8450-gpucc bindings to include SAR2130P.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-5-ecad2a1432ba@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent adac76e7

Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

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Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ description: | 
  domains on Qualcomm SoCs.



  See also::

    include/dt-bindings/clock/qcom,sar2130p-gpucc.h

    include/dt-bindings/clock/qcom,sm4450-gpucc.h

    include/dt-bindings/clock/qcom,sm8450-gpucc.h

    include/dt-bindings/clock/qcom,sm8550-gpucc.h
@@ -24,6 +25,7 @@ description: | 
properties:

  compatible:

    enum:

      - qcom,sar2130p-gpucc

      - qcom,sm4450-gpucc

      - qcom,sm8450-gpucc

      - qcom,sm8550-gpucc

include/dt-bindings/clock/qcom,sar2130p-gpucc.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved

 * Copyright (c) 2024, Linaro Limited

 */



#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H

#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H



/* GPU_CC clocks */

#define GPU_CC_AHB_CLK				0

#define GPU_CC_CRC_AHB_CLK			1

#define GPU_CC_CX_FF_CLK			2

#define GPU_CC_CX_GMU_CLK			3

#define GPU_CC_CXO_AON_CLK			4

#define GPU_CC_CXO_CLK				5

#define GPU_CC_FF_CLK_SRC			6

#define GPU_CC_GMU_CLK_SRC			7

#define GPU_CC_GX_GMU_CLK			8

#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		9

#define GPU_CC_HUB_AON_CLK			10

#define GPU_CC_HUB_CLK_SRC			11

#define GPU_CC_HUB_CX_INT_CLK			12

#define GPU_CC_MEMNOC_GFX_CLK			13

#define GPU_CC_PLL0				14

#define GPU_CC_PLL1				15

#define GPU_CC_SLEEP_CLK			16



/* GDSCs */

#define GPU_GX_GDSC				0

#define GPU_CX_GDSC				1



#endif

include/dt-bindings/reset/qcom,sar2130p-gpucc.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2024, Linaro Limited

 */



#ifndef _DT_BINDINGS_RESET_QCOM_GPU_CC_SAR2130P_H

#define _DT_BINDINGS_RESET_QCOM_GPU_CC_SAR2130P_H



#define GPUCC_GPU_CC_GX_BCR			0

#define GPUCC_GPU_CC_ACD_BCR			1

#define GPUCC_GPU_CC_GX_ACD_IROOT_BCR		2



#endif