Commit 128c8f96 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2025-02-14' of https://gitlab.freedesktop.org/drm/kernel

Pull drm fixes from Dave Airlie:
 "Weekly drm fixes pull request, nothing too unusual, the hdmi tests
  needs a bit of refactoring after lockdep shouted at them, otherwise
  amdgpu and xe lead and a few misc otherwise.

  amdgpu:
   - Fix shutdown regression on old APUs
   - Fix compute queue hang on gfx9 APUs
   - Fix possible invalid access in PSP failure path
   - Avoid possible buffer overflow in pptable override

  amdkfd:
   - Properly free gang bo in failure path
   - GFX12 trap handler fix

  i915:
   - selftest fix: avoid using uninitialized context

  xe:
   - Remove bo->clients out of bos_lock area
   - Carve out wopcm portion from the stolen memory

  tests:
   - fix lockdep with hdmi infrastructure tests

  host1x:
   - fix uninitialised mutex usage

  panthor:
   - fix uninit variable

  hibmc:
   - fix missing Kconfig select"

* tag 'drm-fixes-2025-02-14' of https://gitlab.freedesktop.org/drm/kernel:
  drm: Fix DSC BPP increment decoding
  drm/amdgpu: avoid buffer overflow attach in smu_sys_set_pp_table()
  drm/amdkfd: Ensure consistent barrier state saved in gfx12 trap handler
  drm/amdgpu: bail out when failed to load fw in psp_init_cap_microcode()
  amdkfd: properly free gang_ctx_bo when failed to init user queue
  drm/amdgpu: bump version for RV/PCO compute fix
  drm/amdgpu/gfx9: manually control gfxoff for CS on RV
  drm/amdgpu/pm: fix UVD handing in amdgpu_dpm_set_powergating_by_smu()
  drm/xe: Carve out wopcm portion from the stolen memory
  drm/i915/selftests: avoid using uninitialized context
  drm/xe/client: bo->client does not need bos_lock
  drm/hisilicon/hibmc: select CONFIG_DRM_DISPLAY_DP_HELPER
  drm/panthor: avoid garbage value in panthor_ioctl_dev_query()
  gpu: host1x: Fix a use of uninitialized mutex
  drm/tests: hdmi: Fix recursive locking
  drm/tests: hdmi: Reorder DRM entities variables assignment
  drm/tests: hdmi: Remove redundant assignments
  drm/tests: hdmi: Fix WW_MUTEX_SLOWPATH failures
parents 68763b29 04485cc3
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+2 −1
Original line number Diff line number Diff line
@@ -120,9 +120,10 @@
 * - 3.58.0 - Add GFX12 DCC support
 * - 3.59.0 - Cleared VRAM
 * - 3.60.0 - Add AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE (Vulkan requirement)
 * - 3.61.0 - Contains fix for RV/PCO compute queues
 */
#define KMS_DRIVER_MAJOR	3
#define KMS_DRIVER_MINOR	60
#define KMS_DRIVER_MINOR	61
#define KMS_DRIVER_PATCHLEVEL	0

/*
+3 −2
Original line number Diff line number Diff line
@@ -3815,10 +3815,11 @@ int psp_init_cap_microcode(struct psp_context *psp, const char *chip_name)
		if (err == -ENODEV) {
			dev_warn(adev->dev, "cap microcode does not exist, skip\n");
			err = 0;
			goto out;
		}
		} else {
			dev_err(adev->dev, "fail to initialize cap microcode\n");
		}
		goto out;
	}

	info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP];
	info->ucode_id = AMDGPU_UCODE_ID_CAP;
+34 −2
Original line number Diff line number Diff line
@@ -7437,6 +7437,38 @@ static void gfx_v9_0_ring_emit_cleaner_shader(struct amdgpu_ring *ring)
	amdgpu_ring_write(ring, 0);  /* RESERVED field, programmed to zero */
}

static void gfx_v9_0_ring_begin_use_compute(struct amdgpu_ring *ring)
{
	struct amdgpu_device *adev = ring->adev;
	struct amdgpu_ip_block *gfx_block =
		amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);

	amdgpu_gfx_enforce_isolation_ring_begin_use(ring);

	/* Raven and PCO APUs seem to have stability issues
	 * with compute and gfxoff and gfx pg.  Disable gfx pg during
	 * submission and allow again afterwards.
	 */
	if (gfx_block && amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 1, 0))
		gfx_v9_0_set_powergating_state(gfx_block, AMD_PG_STATE_UNGATE);
}

static void gfx_v9_0_ring_end_use_compute(struct amdgpu_ring *ring)
{
	struct amdgpu_device *adev = ring->adev;
	struct amdgpu_ip_block *gfx_block =
		amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);

	/* Raven and PCO APUs seem to have stability issues
	 * with compute and gfxoff and gfx pg.  Disable gfx pg during
	 * submission and allow again afterwards.
	 */
	if (gfx_block && amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 1, 0))
		gfx_v9_0_set_powergating_state(gfx_block, AMD_PG_STATE_GATE);

	amdgpu_gfx_enforce_isolation_ring_end_use(ring);
}

static const struct amd_ip_funcs gfx_v9_0_ip_funcs = {
	.name = "gfx_v9_0",
	.early_init = gfx_v9_0_early_init,
@@ -7613,8 +7645,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {
	.emit_wave_limit = gfx_v9_0_emit_wave_limit,
	.reset = gfx_v9_0_reset_kcq,
	.emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader,
	.begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use,
	.end_use = amdgpu_gfx_enforce_isolation_ring_end_use,
	.begin_use = gfx_v9_0_ring_begin_use_compute,
	.end_use = gfx_v9_0_ring_end_use_compute,
};

static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {
+2 −1
Original line number Diff line number Diff line
@@ -4121,7 +4121,8 @@ static const uint32_t cwsr_trap_gfx12_hex[] = {
	0x0000ffff, 0x8bfe7e7e,
	0x8bea6a6a, 0xb97af804,
	0xbe804ec2, 0xbf94fffe,
	0xbe804a6c, 0xbfb10000,
	0xbe804a6c, 0xbe804ec2,
	0xbf94fffe, 0xbfb10000,
	0xbf9f0000, 0xbf9f0000,
	0xbf9f0000, 0xbf9f0000,
	0xbf9f0000, 0x00000000,
+4 −0
Original line number Diff line number Diff line
@@ -1049,6 +1049,10 @@ L_SKIP_BARRIER_RESTORE:
	s_rfe_b64	s_restore_pc_lo						//Return to the main shader program and resume execution

L_END_PGM:
	// Make sure that no wave of the workgroup can exit the trap handler
	// before the workgroup barrier state is saved.
	s_barrier_signal	-2
	s_barrier_wait	-2
	s_endpgm_saved
end

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