Commit 12bffaef authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull CXL (Compute Express Link) updates from Dave Jiang:
 "The significant change of interest is the handling of soft reserved
  memory conflict between CXL and HMEM. In essence CXL will be the first
  to claim the soft reserved memory ranges that belongs to CXL and
  attempt to enumerate them with best effort. If CXL is not able to
  enumerate the ranges it will punt them to HMEM.

  There are also MAINTAINERS email changes from Dan Williams and
  Jonathan Cameron"

* tag 'cxl-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (37 commits)
  MAINTAINERS: Update Jonathan Cameron's email address
  cxl/hdm: Add support for 32 switch decoders
  MAINTAINERS: Update address for Dan Williams
  tools/testing/cxl: Enable replay of user regions as auto regions
  cxl/region: Add a region sysfs interface for region lock status
  tools/testing/cxl: Test dax_hmem takeover of CXL regions
  tools/testing/cxl: Simulate auto-assembly failure
  dax/hmem: Parent dax_hmem devices
  dax/hmem: Fix singleton confusion between dax_hmem_work and hmem devices
  dax/hmem: Reduce visibility of dax_cxl coordination symbols
  cxl/region: Constify cxl_region_resource_contains()
  cxl/region: Limit visibility of cxl_region_contains_resource()
  dax/cxl: Fix HMEM dependencies
  cxl/region: Fix use-after-free from auto assembly failure
  cxl/core: Check existence of cxl_memdev_state in poison test
  cxl/core: use cleanup.h for devm_cxl_add_dax_region
  cxl/core/region: move dax region device logic into region_dax.c
  cxl/core/region: move pmem region driver logic into region_pmem.c
  dax/hmem, cxl: Defer and resolve Soft Reserved ownership
  cxl/region: Add helper to check Soft Reserved containment by CXL regions
  ...
parents 7d672741 6c724ce0
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+2 −0
Original line number Diff line number Diff line
@@ -208,6 +208,7 @@ Colin Ian King <colin.i.king@gmail.com> <colin.king@canonical.com>
Corey Minyard <minyard@acm.org>
Damian Hobson-Garcia <dhobsong@igel.co.jp>
Dan Carpenter <error27@gmail.com> <dan.carpenter@oracle.com>
Dan Williams <djbw@kernel.org> <dan.j.williams@intel.com>
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@googlemail.com>
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@iogearbox.net>
Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch>
@@ -427,6 +428,7 @@ John Stultz <johnstul@us.ibm.com>
<jon.toppins+linux@gmail.com> <jtoppins@cumulusnetworks.com>
<jon.toppins+linux@gmail.com> <jtoppins@redhat.com>
Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>
Jonathan Cameron <jic23@kernel.org> <jonathan.cameron@huawei.com>
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
<josh@joshtriplett.org> <josh@freedesktop.org>
<josh@joshtriplett.org> <josh@kernel.org>
+13 −0
Original line number Diff line number Diff line
@@ -508,6 +508,19 @@ Description:
		(RO) The size of extended linear cache, if there is an extended
		linear cache. Otherwise the attribute will not be visible.


What:		/sys/bus/cxl/devices/regionZ/locked
Date:		Mar, 2026
KernelVersion:	v7.1
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) The CXL driver has the capability to lock a region based on
		a BIOS or platform dependent configuration. Regions created as
		locked are never permitted to be destroyed. Resets to participating
		decoders will not result in a region destroy and will not free the
		decoder resources.


What:		/sys/bus/cxl/devices/regionZ/mode
Date:		January, 2023
KernelVersion:	v6.3
+13 −13
Original line number Diff line number Diff line
@@ -4055,7 +4055,7 @@ S: Maintained
F:	crypto/rsa*
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
R:	Dan Williams <dan.j.williams@intel.com>
R:	Dan Williams <djbw@kernel.org>
S:	Odd fixes
W:	http://sourceforge.net/projects/xscaleiop
F:	Documentation/crypto/async-tx-api.rst
@@ -6422,12 +6422,12 @@ F: include/linux/compiler_attributes.h
COMPUTE EXPRESS LINK (CXL)
M:	Davidlohr Bueso <dave@stgolabs.net>
M:	Jonathan Cameron <jonathan.cameron@huawei.com>
M:	Jonathan Cameron <jic23@kernel.org>
M:	Dave Jiang <dave.jiang@intel.com>
M:	Alison Schofield <alison.schofield@intel.com>
M:	Vishal Verma <vishal.l.verma@intel.com>
M:	Ira Weiny <ira.weiny@intel.com>
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
L:	linux-cxl@vger.kernel.org
S:	Maintained
F:	Documentation/driver-api/cxl
@@ -6438,7 +6438,7 @@ F: include/uapi/linux/cxl_mem.h
F:	tools/testing/cxl/
COMPUTE EXPRESS LINK PMU (CPMU)
M:	Jonathan Cameron <jonathan.cameron@huawei.com>
M:	Jonathan Cameron <jic23@kernel.org>
L:	linux-cxl@vger.kernel.org
S:	Maintained
F:	Documentation/admin-guide/perf/cxl.rst
@@ -7295,7 +7295,7 @@ S: Maintained
F:	scripts/dev-needs.sh
DEVICE DIRECT ACCESS (DAX)
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
M:	Vishal Verma <vishal.l.verma@intel.com>
M:	Dave Jiang <dave.jiang@intel.com>
L:	nvdimm@lists.linux.dev
@@ -9852,7 +9852,7 @@ F: include/linux/fcntl.h
F:	include/uapi/linux/fcntl.h
FILESYSTEM DIRECT ACCESS (DAX)
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
R:	Matthew Wilcox <willy@infradead.org>
R:	Jan Kara <jack@suse.cz>
L:	linux-fsdevel@vger.kernel.org
@@ -10597,7 +10597,7 @@ FWCTL SUBSYSTEM
M:	Dave Jiang <dave.jiang@intel.com>
M:	Jason Gunthorpe <jgg@nvidia.com>
M:	Saeed Mahameed <saeedm@nvidia.com>
R:	Jonathan Cameron <Jonathan.Cameron@huawei.com>
R:	Jonathan Cameron <jic23@kernel.org>
S:	Maintained
F:	Documentation/userspace-api/fwctl/
F:	drivers/fwctl/
@@ -12938,7 +12938,7 @@ F: drivers/platform/x86/intel/hid.c
INTEL I/OAT DMA DRIVER
M:	Dave Jiang <dave.jiang@intel.com>
R:	Dan Williams <dan.j.williams@intel.com>
R:	Dan Williams <djbw@kernel.org>
L:	dmaengine@vger.kernel.org
S:	Supported
Q:	https://patchwork.kernel.org/project/linux-dmaengine/list/
@@ -14657,7 +14657,7 @@ K: libie
LIBNVDIMM BTT: BLOCK TRANSLATION TABLE
M:	Vishal Verma <vishal.l.verma@intel.com>
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
M:	Dave Jiang <dave.jiang@intel.com>
L:	nvdimm@lists.linux.dev
S:	Supported
@@ -14666,7 +14666,7 @@ P: Documentation/nvdimm/maintainer-entry-profile.rst
F:	drivers/nvdimm/btt*
LIBNVDIMM PMEM: PERSISTENT MEMORY DRIVER
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
M:	Vishal Verma <vishal.l.verma@intel.com>
M:	Dave Jiang <dave.jiang@intel.com>
L:	nvdimm@lists.linux.dev
@@ -14684,7 +14684,7 @@ F: Documentation/devicetree/bindings/pmem/pmem-region.yaml
F:	drivers/nvdimm/of_pmem.c
LIBNVDIMM: NON-VOLATILE MEMORY DEVICE SUBSYSTEM
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
M:	Vishal Verma <vishal.l.verma@intel.com>
M:	Dave Jiang <dave.jiang@intel.com>
M:	Ira Weiny <ira.weiny@intel.com>
@@ -25361,7 +25361,7 @@ F: drivers/staging/
STANDALONE CACHE CONTROLLER DRIVERS
M:	Conor Dooley <conor@kernel.org>
M:	Jonathan Cameron <jonathan.cameron@huawei.com>
M:	Jonathan Cameron <jic23@kernel.org>
S:	Maintained
T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
F:	Documentation/devicetree/bindings/cache/
@@ -27088,7 +27088,7 @@ S: Maintained
F:	Documentation/devicetree/bindings/trigger-source/*
TRUSTED EXECUTION ENVIRONMENT SECURITY MANAGER (TSM)
M:	Dan Williams <dan.j.williams@intel.com>
M:	Dan Williams <djbw@kernel.org>
L:	linux-coco@lists.linux.dev
S:	Maintained
F:	Documentation/ABI/testing/configfs-tsm-report
+5 −2
Original line number Diff line number Diff line
@@ -654,6 +654,9 @@ int __init acpi_numa_init(void)
	}
	last_real_pxm = fake_pxm;
	fake_pxm++;

	/* No need to expand numa nodes if CXL is disabled */
	if (IS_ENABLED(CONFIG_CXL_ACPI))
		acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, acpi_parse_cfmws,
				      &fake_pxm);

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ cxl_core-y += hdm.o
cxl_core-y += pmu.o
cxl_core-y += cdat.o
cxl_core-$(CONFIG_TRACING) += trace.o
cxl_core-$(CONFIG_CXL_REGION) += region.o
cxl_core-$(CONFIG_CXL_REGION) += region.o region_pmem.o region_dax.o
cxl_core-$(CONFIG_CXL_MCE) += mce.o
cxl_core-$(CONFIG_CXL_FEATURES) += features.o
cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += edac.o
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