Commit 14b7d43c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-tools-fixes-for-v6.12-2-2024-10-30' of... 

Merge tag 'perf-tools-fixes-for-v6.12-2-2024-10-30' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Update more header copies with the kernel sources, including const.h,
   msr-index.h, arm64's cputype.h, kvm's, bits.h and unaligned.h

 - The return from 'write' isn't a pid, fix cut'n'paste error in 'perf
   trace'

 - Fix up the python binding build on architectures without
   HAVE_KVM_STAT_SUPPORT

 - Add some more bounds checks to augmented_raw_syscalls.bpf.c (used to
   collect syscall pointer arguments in 'perf trace') to make the
   resulting bytecode to pass the kernel BPF verifier, allowing us to go
   back accepting clang 12.0.1 as the minimum version required for
   compiling BPF sources

 - Add __NR_capget for x86 to fix a regression on running perf + intel
   PT (hw tracing) as non-root setting up the capabilities as described
   in https://www.kernel.org/doc/html/latest/admin-guide/perf-security.html

 - Fix missing syscalltbl in non-explicitly listed architectures,
   noticed on ARM 32-bit, that still needs a .tbl generator for the
   syscall id<->name tables, should be added for v6.13

 - Handle 'perf test' failure when handling broken DWARF for ASM files

* tag 'perf-tools-fixes-for-v6.12-2-2024-10-30' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools:
  perf cap: Add __NR_capget to arch/x86 unistd
  tools headers: Update the linux/unaligned.h copy with the kernel sources
  tools headers arm64: Sync arm64's cputype.h with the kernel sources
  tools headers: Synchronize {uapi/}linux/bits.h with the kernel sources
  tools arch x86: Sync the msr-index.h copy with the kernel sources
  perf python: Fix up the build on architectures without HAVE_KVM_STAT_SUPPORT
  perf test: Handle perftool-testsuite_probe failure due to broken DWARF
  tools headers UAPI: Sync kvm headers with the kernel sources
  perf trace: Fix non-listed archs in the syscalltbl routines
  perf build: Change the clang check back to 12.0.1
  perf trace augmented_raw_syscalls: Add more checks to pass the verifier
  perf trace augmented_raw_syscalls: Add extra array index bounds checking to satisfy some BPF verifiers
  perf trace: The return from 'write' isn't a pid
  tools headers UAPI: Sync linux/const.h with the kernel headers
parents 4236f913 a5384c42

tools/arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@ 
#define ARM_CPU_PART_NEOVERSE_V3	0xD84

#define ARM_CPU_PART_CORTEX_X925	0xD85

#define ARM_CPU_PART_CORTEX_A725	0xD87

#define ARM_CPU_PART_NEOVERSE_N3	0xD8E



#define APM_CPU_PART_XGENE		0x000

#define APM_CPU_VAR_POTENZA		0x00
@@ -176,6 +177,7 @@ 
#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)

#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)

#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)

#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

tools/arch/x86/include/asm/msr-index.h

+20 −14
Original line number Diff line number Diff line
@@ -36,6 +36,20 @@ 
#define EFER_FFXSR		(1<<_EFER_FFXSR)

#define EFER_AUTOIBRS		(1<<_EFER_AUTOIBRS)



/*

 * Architectural memory types that are common to MTRRs, PAT, VMX MSRs, etc.

 * Most MSRs support/allow only a subset of memory types, but the values

 * themselves are common across all relevant MSRs.

 */

#define X86_MEMTYPE_UC		0ull	/* Uncacheable, a.k.a. Strong Uncacheable */

#define X86_MEMTYPE_WC		1ull	/* Write Combining */

/* RESERVED			2 */

/* RESERVED			3 */

#define X86_MEMTYPE_WT		4ull	/* Write Through */

#define X86_MEMTYPE_WP		5ull	/* Write Protected */

#define X86_MEMTYPE_WB		6ull	/* Write Back */

#define X86_MEMTYPE_UC_MINUS	7ull	/* Weak Uncacheabled (PAT only) */



/* FRED MSRs */

#define MSR_IA32_FRED_RSP0	0x1cc			/* Level 0 stack pointer */

#define MSR_IA32_FRED_RSP1	0x1cd			/* Level 1 stack pointer */
@@ -365,6 +379,12 @@ 


#define MSR_IA32_CR_PAT			0x00000277



#define PAT_VALUE(p0, p1, p2, p3, p4, p5, p6, p7)			\

	((X86_MEMTYPE_ ## p0)      | (X86_MEMTYPE_ ## p1 << 8)  |	\

	(X86_MEMTYPE_ ## p2 << 16) | (X86_MEMTYPE_ ## p3 << 24) |	\

	(X86_MEMTYPE_ ## p4 << 32) | (X86_MEMTYPE_ ## p5 << 40) |	\

	(X86_MEMTYPE_ ## p6 << 48) | (X86_MEMTYPE_ ## p7 << 56))



#define MSR_IA32_DEBUGCTLMSR		0x000001d9

#define MSR_IA32_LASTBRANCHFROMIP	0x000001db

#define MSR_IA32_LASTBRANCHTOIP		0x000001dc
@@ -1159,15 +1179,6 @@ 
#define MSR_IA32_VMX_VMFUNC             0x00000491

#define MSR_IA32_VMX_PROCBASED_CTLS3	0x00000492



/* VMX_BASIC bits and bitmasks */

#define VMX_BASIC_VMCS_SIZE_SHIFT	32

#define VMX_BASIC_TRUE_CTLS		(1ULL << 55)

#define VMX_BASIC_64		0x0001000000000000LLU

#define VMX_BASIC_MEM_TYPE_SHIFT	50

#define VMX_BASIC_MEM_TYPE_MASK	0x003c000000000000LLU

#define VMX_BASIC_MEM_TYPE_WB	6LLU

#define VMX_BASIC_INOUT		0x0040000000000000LLU



/* Resctrl MSRs: */

/* - Intel: */

#define MSR_IA32_L3_QOS_CFG		0xc81
@@ -1185,11 +1196,6 @@ 
#define MSR_IA32_SMBA_BW_BASE		0xc0000280

#define MSR_IA32_EVT_CFG_BASE		0xc0000400



/* MSR_IA32_VMX_MISC bits */

#define MSR_IA32_VMX_MISC_INTEL_PT                 (1ULL << 14)

#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)

#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE   0x1F



/* AMD-V MSRs */

#define MSR_VM_CR                       0xc0010114

#define MSR_VM_IGNNE                    0xc0010115

tools/arch/x86/include/uapi/asm/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -439,6 +439,7 @@ struct kvm_sync_regs { 
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)

#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)

#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)

#define KVM_X86_QUIRK_SLOT_ZAP_ALL		(1 << 7)



#define KVM_STATE_NESTED_FORMAT_VMX	0

#define KVM_STATE_NESTED_FORMAT_SVM	1

tools/arch/x86/include/uapi/asm/unistd_32.h

+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,9 @@ 
#ifndef __NR_getpgid

#define __NR_getpgid 132

#endif

#ifndef __NR_capget

#define __NR_capget 184

#endif

#ifndef __NR_gettid

#define __NR_gettid 224

#endif

tools/arch/x86/include/uapi/asm/unistd_64.h

+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,9 @@ 
#ifndef __NR_getpgid

#define __NR_getpgid 121

#endif

#ifndef __NR_capget

#define __NR_capget 125

#endif

#ifndef __NR_gettid

#define __NR_gettid 186

#endif