Commit 1519018c authored by Catalin Marinas's avatar Catalin Marinas
Browse files

Merge branches 'for-next/sve-remove-pseudo-regs', 'for-next/backtrace-ipi',... 

Merge branches 'for-next/sve-remove-pseudo-regs', 'for-next/backtrace-ipi', 'for-next/kselftest', 'for-next/misc' and 'for-next/cpufeat-display-cores', remote-tracking branch 'arm64/for-next/perf' into for-next/core

* arm64/for-next/perf:
  perf: hisi: Fix use-after-free when register pmu fails
  drivers/perf: hisi_pcie: Initialize event->cpu only on success
  drivers/perf: hisi_pcie: Check the type first in pmu::event_init()
  perf/arm-cmn: Enable per-DTC counter allocation
  perf/arm-cmn: Rework DTC counters (again)
  perf/arm-cmn: Fix DTC domain detection
  drivers: perf: arm_pmuv3: Drop some unused arguments from armv8_pmu_init()
  drivers: perf: arm_pmuv3: Read PMMIR_EL1 unconditionally
  drivers/perf: hisi: use cpuhp_state_remove_instance_nocalls() for hisi_hns3_pmu uninit process
  drivers/perf: xgene: Use device_get_match_data()
  perf/amlogic: add missing MODULE_DEVICE_TABLE
  docs/perf: Add ampere_cspmu to toctree to fix a build warning
  perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU
  perf: arm_cspmu: Support implementation specific validation
  perf: arm_cspmu: Support implementation specific filters
  perf: arm_cspmu: Split 64-bit write to 32-bit writes
  perf: arm_cspmu: Separate Arm and vendor module

* for-next/sve-remove-pseudo-regs:
  : arm64/fpsimd: Remove the vector length pseudo registers
  arm64/sve: Remove SMCR pseudo register from cpufeature code
  arm64/sve: Remove ZCR pseudo register from cpufeature code

* for-next/backtrace-ipi:
  : Add IPI for backtraces/kgdb, use NMI
  arm64: smp: Don't directly call arch_smp_send_reschedule() for wakeup
  arm64: smp: avoid NMI IPIs with broken MediaTek FW
  arm64: smp: Mark IPI globals as __ro_after_init
  arm64: kgdb: Implement kgdb_roundup_cpus() to enable pseudo-NMI roundup
  arm64: smp: IPI_CPU_STOP and IPI_CPU_CRASH_STOP should try for NMI
  arm64: smp: Add arch support for backtrace using pseudo-NMI
  arm64: smp: Remove dedicated wakeup IPI
  arm64: idle: Tag the arm64 idle functions as __cpuidle
  irqchip/gic-v3: Enable support for SGIs to act as NMIs

* for-next/kselftest:
  : Various arm64 kselftest updates
  kselftest/arm64: Validate SVCR in streaming SVE stress test

* for-next/misc:
  : Miscellaneous patches
  arm64: Restrict CPU_BIG_ENDIAN to GNU as or LLVM IAS 15.x or newer
  arm64: module: Fix PLT counting when CONFIG_RANDOMIZE_BASE=n
  arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helper
  clocksource/drivers/arm_arch_timer: limit XGene-1 workaround
  arm64: Remove system_uses_lse_atomics()
  arm64: Mark the 'addr' argument to set_ptes() and __set_pte_at() as unused
  arm64/mm: Hoist synchronization out of set_ptes() loop
  arm64: swiotlb: Reduce the default size if no ZONE_DMA bouncing needed

* for-next/cpufeat-display-cores:
  : arm64 cpufeature display enabled cores
  arm64: cpufeature: Change DBM to display enabled cores
  arm64: cpufeature: Display the set of cores with a feature
parents b805cafc 39120848 ef31b8ce 11a7a42e 146a15b8 04d402a4

arch/arm64/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -1355,6 +1355,8 @@ choice 
config CPU_BIG_ENDIAN

	bool "Build big-endian kernel"

	depends on !LD_IS_LLD || LLD_VERSION >= 130000

	# https://github.com/llvm/llvm-project/commit/1379b150991f70a5782e9a143c2ba5308da1161c

	depends on AS_IS_GNU || AS_VERSION >= 150000

	help

	  Say Y if you plan on running a kernel with a big-endian userspace.

arch/arm64/include/asm/cpu.h

+0 −6
Original line number Diff line number Diff line
@@ -63,12 +63,6 @@ struct cpuinfo_arm64 { 
	u64		reg_id_aa64smfr0;



	struct cpuinfo_32bit	aarch32;



	/* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */

	u64		reg_zcr;



	/* pseudo-SMCR for recording maximum SMCR_EL1 LEN value: */

	u64		reg_smcr;

};



DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);

arch/arm64/include/asm/cpufeature.h

+2 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/bug.h>

#include <linux/jump_label.h>

#include <linux/kernel.h>

#include <linux/cpumask.h>



/*

 * CPU feature register tracking
@@ -380,6 +381,7 @@ struct arm64_cpu_capabilities { 
	 * method is robust against being called multiple times.

	 */

	const struct arm64_cpu_capabilities *match_list;

	const struct cpumask *cpus;

};



static inline int cpucap_default_scope(const struct arm64_cpu_capabilities *cap)

arch/arm64/include/asm/cputype.h

+2 −1
Original line number Diff line number Diff line
@@ -85,7 +85,8 @@ 
#define ARM_CPU_PART_NEOVERSE_N2	0xD49

#define ARM_CPU_PART_CORTEX_A78C	0xD4B



#define APM_CPU_PART_POTENZA		0x000

#define APM_CPU_PART_XGENE		0x000

#define APM_CPU_VAR_POTENZA		0x00



#define CAVIUM_CPU_PART_THUNDERX	0x0A1

#define CAVIUM_CPU_PART_THUNDERX_81XX	0x0A2

arch/arm64/include/asm/fpsimd.h

+0 −1
Original line number Diff line number Diff line
@@ -128,7 +128,6 @@ extern void sme_kernel_enable(const struct arm64_cpu_capabilities *__unused); 
extern void sme2_kernel_enable(const struct arm64_cpu_capabilities *__unused);

extern void fa64_kernel_enable(const struct arm64_cpu_capabilities *__unused);



extern u64 read_zcr_features(void);

extern u64 read_smcr_features(void);



/*