Commit 154fcf3a authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ingo Molnar
Browse files

x86/msr: Prepare for including <linux/percpu.h> into <asm/msr.h> 



To clean up the per CPU insanity of UP which causes sparse to be rightfully
unhappy and prevents the usage of the generic per CPU accessors on cpu_info
it is necessary to include <linux/percpu.h> into <asm/msr.h>.

Including <linux/percpu.h> into <asm/msr.h> is impossible because it ends
up in header dependency hell. The problem is that <asm/processor.h>
includes <asm/msr.h>. The inclusion of <linux/percpu.h> results in a
compile fail where the compiler cannot longer handle an include in
<asm/cpufeature.h> which references boot_cpu_data which is
defined in <asm/processor.h>.

The only reason why <asm/msr.h> is included in <asm/processor.h> are the
set/get_debugctlmsr() inlines. They are defined there because <asm/processor.h>
is such a nice dump ground for everything. In fact they belong obviously
into <asm/debugreg.h>.

Move them to <asm/debugreg.h> and fix up the resulting damage which is just
exposing the reliance on random include chains.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20240304005104.454678686@linutronix.de
parent 9eae297d

arch/x86/events/intel/core.c

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/kvm_host.h>



#include <asm/cpufeature.h>

#include <asm/debugreg.h>

#include <asm/hardirq.h>

#include <asm/intel-family.h>

#include <asm/intel_pt.h>

arch/x86/events/intel/ds.c

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
#include <linux/sched/clock.h>



#include <asm/cpu_entry_area.h>

#include <asm/debugreg.h>

#include <asm/perf_event.h>

#include <asm/tlbflush.h>

#include <asm/insn.h>

arch/x86/include/asm/debugreg.h

+24 −0
Original line number Diff line number Diff line
@@ -5,7 +5,9 @@ 
#include <linux/bug.h>

#include <linux/percpu.h>

#include <uapi/asm/debugreg.h>



#include <asm/cpufeature.h>

#include <asm/msr.h>



DECLARE_PER_CPU(unsigned long, cpu_dr7);
@@ -159,4 +161,26 @@ static inline unsigned long amd_get_dr_addr_mask(unsigned int dr) 
}

#endif



static inline unsigned long get_debugctlmsr(void)

{

	unsigned long debugctlmsr = 0;



#ifndef CONFIG_X86_DEBUGCTLMSR

	if (boot_cpu_data.x86 < 6)

		return 0;

#endif

	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);



	return debugctlmsr;

}



static inline void update_debugctlmsr(unsigned long debugctlmsr)

{

#ifndef CONFIG_X86_DEBUGCTLMSR

	if (boot_cpu_data.x86 < 6)

		return;

#endif

	wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);

}



#endif /* _ASM_X86_DEBUGREG_H */

arch/x86/include/asm/fsgsbase.h

+1 −1
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ 


#ifdef CONFIG_X86_64



#include <asm/msr-index.h>

#include <asm/msr.h>



/*

 * Read/write a task's FSBASE or GSBASE. This returns the value that

arch/x86/include/asm/processor.h

+0 −22
Original line number Diff line number Diff line
@@ -576,28 +576,6 @@ extern void cpu_init(void); 
extern void cpu_init_exception_handling(void);

extern void cr4_init(void);



static inline unsigned long get_debugctlmsr(void)

{

	unsigned long debugctlmsr = 0;



#ifndef CONFIG_X86_DEBUGCTLMSR

	if (boot_cpu_data.x86 < 6)

		return 0;

#endif

	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);



	return debugctlmsr;

}



static inline void update_debugctlmsr(unsigned long debugctlmsr)

{

#ifndef CONFIG_X86_DEBUGCTLMSR

	if (boot_cpu_data.x86 < 6)

		return;

#endif

	wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);

}



extern void set_task_blockstep(struct task_struct *task, bool on);



/* Boot loader type from the setup header: */