Unverified Commit 1624dead authored by Alok Tiwari's avatar Alok Tiwari Committed by Stephen Boyd
Browse files

clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver 



The conditional check for the PLL0 multiplier 'm' used a logical AND
instead of OR, making the range check ineffective. This patch replaces
&& with || to correctly reject invalid values of 'm' that are either
less than or equal to 0 or greater than LPC18XX_PLL0_MSEL_MAX.

This ensures proper bounds checking during clk rate setting and rounding.

Fixes: b04e0b8f ("clk: add lpc18xx cgu clk driver")
Signed-off-by: default avatarAlok Tiwari <alok.a.tiwari@oracle.com>
[sboyd@kernel.org: 'm' is unsigned so remove < condition]
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 91ec7ad7

drivers/clk/nxp/clk-lpc18xx-cgu.c

+2 −2
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ static int lpc18xx_pll0_determine_rate(struct clk_hw *hw, 
	}



	m = DIV_ROUND_UP_ULL(req->best_parent_rate, req->rate * 2);

	if (m <= 0 && m > LPC18XX_PLL0_MSEL_MAX) {

	if (m == 0 || m > LPC18XX_PLL0_MSEL_MAX) {

		pr_warn("%s: unable to support rate %lu\n", __func__, req->rate);

		return -EINVAL;

	}
@@ -404,7 +404,7 @@ static int lpc18xx_pll0_set_rate(struct clk_hw *hw, unsigned long rate, 
	}



	m = DIV_ROUND_UP_ULL(parent_rate, rate * 2);

	if (m <= 0 && m > LPC18XX_PLL0_MSEL_MAX) {

	if (m == 0 || m > LPC18XX_PLL0_MSEL_MAX) {

		pr_warn("%s: unable to support rate %lu\n", __func__, rate);

		return -EINVAL;

	}