Commit 16448cf4 authored by Jouni Högander's avatar Jouni Högander
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drm/i915/display: Read PSR configuration before VSC SDP 



VSC SDP sending is taken care by PSR HW and it's not enabled in
VIDEO_DIP_CTL when PSR is enabled. Readback of VSC SDP is depending on
VSC_SDP being set in intel_crtc_state->infoframes.enabled. In case of PSR
setting this flag is taken care by PSR code -> read back PSR configuration
before reading VSC SDP otherwise we get pipeconfig mismatch error.

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: default avatarShawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-7-jouni.hogander@intel.com
parent 6b627613

drivers/gpu/drm/i915/display/intel_ddi.c

+2 −2
Original line number Diff line number Diff line
@@ -3941,11 +3941,11 @@ static void intel_ddi_get_config(struct intel_encoder *encoder, 
	if (DISPLAY_VER(dev_priv) >= 8)

		bdw_get_trans_port_sync_config(pipe_config);



	intel_psr_get_config(encoder, pipe_config);



	intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);

	intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);



	intel_psr_get_config(encoder, pipe_config);



	intel_audio_codec_get_config(encoder, pipe_config);

}