Commit 182af026 authored by Jiawen Wu's avatar Jiawen Wu Committed by Paolo Abeni
Browse files

net: txgbe: Implement PTP for AML devices 



Support PTP clock and 1PPS output signal for AML devices.

Signed-off-by: default avatarJiawen Wu <jiawenwu@trustnetic.com>
Link: https://patch.msgid.link/F2F6E5E8899D2C20+20250521064402.22348-9-jiawenwu@trustnetic.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent d84a3ff9

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

+26 −4
Original line number Diff line number Diff line
@@ -15,12 +15,14 @@ 
#define WX_INCVAL_100         0xA00000

#define WX_INCVAL_10          0xC7F380

#define WX_INCVAL_EM          0x2000000

#define WX_INCVAL_AML         0xA00000



#define WX_INCVAL_SHIFT_10GB  20

#define WX_INCVAL_SHIFT_1GB   18

#define WX_INCVAL_SHIFT_100   15

#define WX_INCVAL_SHIFT_10    12

#define WX_INCVAL_SHIFT_EM    22

#define WX_INCVAL_SHIFT_AML   21



#define WX_OVERFLOW_PERIOD    (HZ * 30)

#define WX_PTP_TX_TIMEOUT     (HZ)
@@ -504,15 +506,27 @@ static long wx_ptp_create_clock(struct wx *wx) 
	wx->ptp_caps.gettimex64 = wx_ptp_gettimex64;

	wx->ptp_caps.settime64 = wx_ptp_settime64;

	wx->ptp_caps.do_aux_work = wx_ptp_do_aux_work;

	if (wx->mac.type == wx_mac_em) {

		wx->ptp_caps.max_adj = 500000000;

	switch (wx->mac.type) {

	case wx_mac_aml:

	case wx_mac_aml40:

		wx->ptp_caps.max_adj = 250000000;

		wx->ptp_caps.n_per_out = 1;

		wx->ptp_setup_sdp = wx_ptp_setup_sdp;

		wx->ptp_caps.enable = wx_ptp_feature_enable;

	} else {

		break;

	case wx_mac_sp:

		wx->ptp_caps.max_adj = 250000000;

		wx->ptp_caps.n_per_out = 0;

		wx->ptp_setup_sdp = NULL;

		break;

	case wx_mac_em:

		wx->ptp_caps.max_adj = 500000000;

		wx->ptp_caps.n_per_out = 1;

		wx->ptp_setup_sdp = wx_ptp_setup_sdp;

		wx->ptp_caps.enable = wx_ptp_feature_enable;

		break;

	default:

		return -EOPNOTSUPP;

	}



	wx->ptp_clock = ptp_clock_register(&wx->ptp_caps, &wx->pdev->dev);
@@ -647,10 +661,18 @@ static u64 wx_ptp_read(const struct cyclecounter *hw_cc) 


static void wx_ptp_link_speed_adjust(struct wx *wx, u32 *shift, u32 *incval)

{

	if (wx->mac.type == wx_mac_em) {

	switch (wx->mac.type) {

	case wx_mac_aml:

	case wx_mac_aml40:

		*shift = WX_INCVAL_SHIFT_AML;

		*incval = WX_INCVAL_AML;

		return;

	case wx_mac_em:

		*shift = WX_INCVAL_SHIFT_EM;

		*incval = WX_INCVAL_EM;

		return;

	default:

		break;

	}



	switch (wx->speed) {

drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c

+6 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 


#include "../libwx/wx_type.h"

#include "../libwx/wx_lib.h"

#include "../libwx/wx_ptp.h"

#include "../libwx/wx_hw.h"

#include "txgbe_type.h"

#include "txgbe_aml.h"
@@ -311,6 +312,9 @@ static void txgbe_mac_link_up_aml(struct phylink_config *config, 
	wr32(wx, TXGBE_AML_MAC_TX_CFG, txcfg | TXGBE_AML_MAC_TX_CFG_TE);



	wx->speed = speed;

	wx->last_rx_ptp_check = jiffies;

	if (test_bit(WX_STATE_PTP_RUNNING, wx->state))

		wx_ptp_reset_cyclecounter(wx);

}



static void txgbe_mac_link_down_aml(struct phylink_config *config,
@@ -323,6 +327,8 @@ static void txgbe_mac_link_down_aml(struct phylink_config *config, 
	wr32m(wx, WX_MAC_RX_CFG, WX_MAC_RX_CFG_RE, 0);



	wx->speed = SPEED_UNKNOWN;

	if (test_bit(WX_STATE_PTP_RUNNING, wx->state))

		wx_ptp_reset_cyclecounter(wx);

}



static void txgbe_mac_config_aml(struct phylink_config *config, unsigned int mode,

drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c

+5 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include "../libwx/wx_type.h"

#include "../libwx/wx_lib.h"

#include "../libwx/wx_ptp.h"

#include "../libwx/wx_hw.h"

#include "../libwx/wx_sriov.h"

#include "txgbe_type.h"
@@ -178,6 +179,10 @@ static irqreturn_t txgbe_misc_irq_thread_fn(int irq, void *data) 
		handle_nested_irq(sub_irq);

		nhandled++;

	}

	if (unlikely(eicr & TXGBE_PX_MISC_IC_TIMESYNC)) {

		wx_ptp_check_pps_event(wx);

		nhandled++;

	}



	wx_intr_enable(wx, TXGBE_INTR_MISC);

	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

+2 −1
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ 
/* Extended Interrupt Enable Set */

#define TXGBE_PX_MISC_ETH_LKDN                  BIT(8)

#define TXGBE_PX_MISC_DEV_RST                   BIT(10)

#define TXGBE_PX_MISC_IC_TIMESYNC               BIT(11)

#define TXGBE_PX_MISC_ETH_EVENT                 BIT(17)

#define TXGBE_PX_MISC_ETH_LK                    BIT(18)

#define TXGBE_PX_MISC_ETH_AN                    BIT(19)
@@ -92,7 +93,7 @@ 
	(TXGBE_PX_MISC_ETH_LKDN | TXGBE_PX_MISC_DEV_RST | \

	 TXGBE_PX_MISC_ETH_EVENT | TXGBE_PX_MISC_ETH_LK | \

	 TXGBE_PX_MISC_ETH_AN | TXGBE_PX_MISC_INT_ERR | \

	 TXGBE_PX_MISC_IC_VF_MBOX)

	 TXGBE_PX_MISC_IC_VF_MBOX | TXGBE_PX_MISC_IC_TIMESYNC)



/* Port cfg registers */

#define TXGBE_CFG_PORT_ST                       0x14404