Commit 18c32de6 authored by Harry Austen's avatar Harry Austen Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: msm8996: add blsp1_i2c6 node 



Add support for the sixth I2C interface on the MSM8996 SoC.

Signed-off-by: default avatarHarry Austen <hpausten@protonmail.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-3-hpausten@protonmail.com
parent 1a94ba5b

arch/arm64/boot/dts/qcom/msm8996.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -1332,6 +1332,20 @@ blsp2_i2c2_sleep: blsp2-i2c2-sleep-state { 
				bias-disable;

			};



			blsp1_i2c6_default: blsp1-i2c6-state {

				pins = "gpio27", "gpio28";

				function = "blsp_i2c6";

				drive-strength = <16>;

				bias-disable;

			};



			blsp1_i2c6_sleep: blsp1-i2c6-sleep-state {

				pins = "gpio27", "gpio28";

				function = "gpio";

				drive-strength = <2>;

				bias-pull-up;

			};



			cci0_default: cci0-default-state {

				pins = "gpio17", "gpio18";

				function = "cci_i2c";
@@ -3141,6 +3155,23 @@ blsp1_i2c3: i2c@7577000 { 
			status = "disabled";

		};



		blsp1_i2c6: i2c@757a000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x757a000 0x1000>;

			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,

				 <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp1_i2c6_default>;

			pinctrl-1 = <&blsp1_i2c6_sleep>;

			dmas = <&blsp1_dma 22>, <&blsp1_dma 23>;

			dma-names = "tx", "rx";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		blsp2_dma: dma-controller@7584000 {

			compatible = "qcom,bam-v1.7.0";

			reg = <0x07584000 0x2b000>;