Commit 1b85d923 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch kvm-arm64/misc-6.16 into kvmarm-master/next 



* kvm-arm64/misc-6.16:
  : .
  : Misc changes and improvements for 6.16:
  :
  : - Add a new selftest for the SVE host state being corrupted by a guest
  :
  : - Keep HCR_EL2.xMO set at all times for systems running with the kernel at EL2,
  :   ensuring that the window for interrupts is slightly bigger, and avoiding
  :   a pretty bad erratum on the AmpereOne HW
  :
  : - Replace a couple of open-coded on/off strings with str_on_off()
  :
  : - Get rid of the pKVM memblock sorting, which now appears to be superflous
  :
  : - Drop superflous clearing of ICH_LR_EOI in the LR when nesting
  :
  : - Add workaround for AmpereOne's erratum AC04_CPU_23, which suffers from
  :   a pretty bad case of TLB corruption unless accesses to HCR_EL2 are
  :   heavily synchronised
  :
  : - Add a per-VM, per-ITS debugfs entry to dump the state of the ITS tables
  :   in a human-friendly fashion
  : .
  KVM: arm64: Fix documentation for vgic_its_iter_next()
  KVM: arm64: vgic-its: Add debugfs interface to expose ITS tables
  arm64: errata: Work around AmpereOne's erratum AC04_CPU_23
  KVM: arm64: nv: Remove clearing of ICH_LR<n>.EOI if ICH_LR<n>.HW == 1
  KVM: arm64: Drop sort_memblock_regions()
  KVM: arm64: selftests: Add test for SVE host corruption
  KVM: arm64: Force HCR_EL2.xMO to 1 at all times in VHE mode
  KVM: arm64: Replace ternary flags with str_on_off() helper

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 7f3225fe bf809a0a

Documentation/arch/arm64/silicon-errata.rst

+2 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| Ampere         | AmpereOne AC04  | AC04_CPU_10     | AMPERE_ERRATUM_AC03_CPU_38  |

+----------------+-----------------+-----------------+-----------------------------+

| Ampere         | AmpereOne AC04  | AC04_CPU_23     | AMPERE_ERRATUM_AC04_CPU_23  |

+----------------+-----------------+-----------------+-----------------------------+

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A510     | #2457168        | ARM64_ERRATUM_2457168       |

+----------------+-----------------+-----------------+-----------------------------+

arch/arm64/Kconfig

+17 −0
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@@ -464,6 +464,23 @@ config AMPERE_ERRATUM_AC03_CPU_38 


	  If unsure, say Y.



config AMPERE_ERRATUM_AC04_CPU_23

        bool "AmpereOne: AC04_CPU_23:  Failure to synchronize writes to HCR_EL2 may corrupt address translations."

	default y

	help

	  This option adds an alternative code sequence to work around Ampere

	  errata AC04_CPU_23 on AmpereOne.



	  Updates to HCR_EL2 can rarely corrupt simultaneous translations for

	  data addresses initiated by load/store instructions. Only

	  instruction initiated translations are vulnerable, not translations

	  from prefetches for example. A DSB before the store to HCR_EL2 is

	  sufficient to prevent older instructions from hitting the window

	  for corruption, and an ISB after is sufficient to prevent younger

	  instructions from hitting the window for corruption.



	  If unsure, say Y.



config ARM64_WORKAROUND_CLEAN_CACHE

	bool

arch/arm64/include/asm/el2_setup.h

+1 −1
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@@ -38,7 +38,7 @@ 


	orr	x0, x0, #HCR_E2H

.LnVHE_\@:

	msr	hcr_el2, x0

	msr_hcr_el2 x0

	isb

.endm

arch/arm64/include/asm/hardirq.h

+2 −2
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ do { \ 
									\

	___hcr = read_sysreg(hcr_el2);					\

	if (!(___hcr & HCR_TGE)) {					\

		write_sysreg(___hcr | HCR_TGE, hcr_el2);		\

		write_sysreg_hcr(___hcr | HCR_TGE);			\

		isb();							\

	}								\

	/*								\
@@ -82,7 +82,7 @@ do { \ 
	 */								\

	barrier();							\

	if (!___ctx->cnt && !(___hcr & HCR_TGE))			\

		write_sysreg(___hcr, hcr_el2);				\

		write_sysreg_hcr(___hcr);				\

} while (0)



static inline void ack_bad_irq(unsigned int irq)

arch/arm64/include/asm/kvm_arm.h

+1 −1
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@@ -103,7 +103,7 @@ 
			 HCR_FMO | HCR_IMO | HCR_PTW | HCR_TID3 | HCR_TID1)

#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)

#define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)

#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)

#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H | HCR_AMO | HCR_IMO | HCR_FMO)



#define HCRX_HOST_FLAGS (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM)

#define MPAMHCR_HOST_FLAGS	0