Commit 1ba40079 authored by Neil Armstrong's avatar Neil Armstrong Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8550: add interconnect and opp-peak-kBps for GPU 



Each GPU OPP requires a specific peak DDR bandwidth, let's add
those to each OPP and also the related interconnect path.

Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241217-topic-sm8x50-gpu-bw-vote-v6-6-1adaf97e7310@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent b8993bd7

arch/arm64/boot/dts/qcom/sm8550.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <dt-bindings/firmware/qcom,scm.h>

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interconnect/qcom,icc.h>

#include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>

#include <dt-bindings/mailbox/qcom-ipcc.h>

#include <dt-bindings/power/qcom-rpmpd.h>
@@ -2114,6 +2115,10 @@ gpu: gpu@3d00000 { 
			qcom,gmu = <&gmu>;

			#cooling-cells = <2>;



			interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;

			interconnect-names = "gfx-mem";



			status = "disabled";



			zap-shader {
@@ -2127,41 +2132,49 @@ gpu_opp_table: opp-table { 
				opp-680000000 {

					opp-hz = /bits/ 64 <680000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

					opp-peak-kBps = <16500000>;

				};



				opp-615000000 {

					opp-hz = /bits/ 64 <615000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;

					opp-peak-kBps = <12449218>;

				};



				opp-550000000 {

					opp-hz = /bits/ 64 <550000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;

					opp-peak-kBps = <10687500>;

				};



				opp-475000000 {

					opp-hz = /bits/ 64 <475000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;

					opp-peak-kBps = <6074218>;

				};



				opp-401000000 {

					opp-hz = /bits/ 64 <401000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

					opp-peak-kBps = <6074218>;

				};



				opp-348000000 {

					opp-hz = /bits/ 64 <348000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;

					opp-peak-kBps = <6074218>;

				};



				opp-295000000 {

					opp-hz = /bits/ 64 <295000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;

					opp-peak-kBps = <6074218>;

				};



				opp-220000000 {

					opp-hz = /bits/ 64 <220000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;

					opp-peak-kBps = <2136718>;

				};

			};

		};