Commit 1d4ef964 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson
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arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks 



QMP PHY used in SC8280XP requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from GCC

Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent dde77140

arch/arm64/boot/dts/qcom/sc8280xp.dtsi

+12 −6
Original line number Diff line number Diff line
@@ -2257,9 +2257,12 @@ ufs_mem_phy: phy@1d87000 { 
			compatible = "qcom,sc8280xp-qmp-ufs-phy";

			reg = <0 0x01d87000 0 0x1000>;



			clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

			clock-names = "ref", "ref_aux";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,

				 <&gcc GCC_UFS_CARD_CLKREF_CLK>;

			clock-names = "ref",

				      "ref_aux",

				      "qref";



			power-domains = <&gcc UFS_PHY_GDSC>;
@@ -2319,9 +2322,12 @@ ufs_card_phy: phy@1da7000 { 
			compatible = "qcom,sc8280xp-qmp-ufs-phy";

			reg = <0 0x01da7000 0 0x1000>;



			clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,

				 <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;

			clock-names = "ref", "ref_aux";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&gcc GCC_UFS_CARD_PHY_AUX_CLK>,

				 <&gcc GCC_UFS_1_CARD_CLKREF_CLK>;

			clock-names = "ref",

				      "ref_aux",

				      "qref";



			power-domains = <&gcc UFS_CARD_GDSC>;