Commit 1ddeb0ef authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-urgent-2024-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 perf fixes from Thomas Gleixner:

 - Move the smp_processor_id() invocation back into the non-preemtible
   region, so that the result is valid to use

 - Add the missing package C2 residency counters for Sierra Forest CPUs
   to make the newly added support actually useful

* tag 'perf-urgent-2024-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86: Fix smp_processor_id()-in-preemptible warnings
  perf/x86/intel/cstate: Add pkg C2 residency counter for Sierra Forest
parents 953f7764 f73cefa3

arch/x86/events/core.c

+12 −10
Original line number Diff line number Diff line
@@ -1520,20 +1520,23 @@ static void x86_pmu_start(struct perf_event *event, int flags) 
void perf_event_print_debug(void)

{

	u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;

	unsigned long *cntr_mask, *fixed_cntr_mask;

	struct event_constraint *pebs_constraints;

	struct cpu_hw_events *cpuc;

	u64 pebs, debugctl;

	int cpu = smp_processor_id();

	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);

	unsigned long *cntr_mask = hybrid(cpuc->pmu, cntr_mask);

	unsigned long *fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask);

	struct event_constraint *pebs_constraints = hybrid(cpuc->pmu, pebs_constraints);

	unsigned long flags;

	int idx;

	int cpu, idx;



	guard(irqsave)();



	cpu = smp_processor_id();

	cpuc = &per_cpu(cpu_hw_events, cpu);

	cntr_mask = hybrid(cpuc->pmu, cntr_mask);

	fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask);

	pebs_constraints = hybrid(cpuc->pmu, pebs_constraints);



	if (!*(u64 *)cntr_mask)

		return;



	local_irq_save(flags);



	if (x86_pmu.version >= 2) {

		rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);

		rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
@@ -1577,7 +1580,6 @@ void perf_event_print_debug(void) 
		pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",

			cpu, idx, pmc_count);

	}

	local_irq_restore(flags);

}



void x86_pmu_stop(struct perf_event *event, int flags)

arch/x86/events/intel/cstate.c

+3 −2
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ 
 *			       perf code: 0x00

 *			       Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL,

 *						KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL,

 *						RPL,SPR,MTL,ARL,LNL

 *						RPL,SPR,MTL,ARL,LNL,SRF

 *			       Scope: Package (physical package)

 *	MSR_PKG_C3_RESIDENCY:  Package C3 Residency Counter.

 *			       perf code: 0x01
@@ -693,7 +693,8 @@ static const struct cstate_model srf_cstates __initconst = { 
	.core_events		= BIT(PERF_CSTATE_CORE_C1_RES) |

				  BIT(PERF_CSTATE_CORE_C6_RES),



	.pkg_events		= BIT(PERF_CSTATE_PKG_C6_RES),

	.pkg_events		= BIT(PERF_CSTATE_PKG_C2_RES) |

				  BIT(PERF_CSTATE_PKG_C6_RES),



	.module_events		= BIT(PERF_CSTATE_MODULE_C6_RES),

};