Commit 1e0ea4df authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull iommu updates from Joerg Roedel:
 "Core changes:
   - Rust bindings for IO-pgtable code
   - IOMMU page allocation debugging support
   - Disable ATS during PCI resets

  Intel VT-d changes:
   - Skip dev-iotlb flush for inaccessible PCIe device
   - Flush cache for PASID table before using it
   - Use right invalidation method for SVA and NESTED domains
   - Ensure atomicity in context and PASID entry updates

  AMD-Vi changes:
   - Support for nested translations
   - Other minor improvements

  ARM-SMMU-v2 changes:
   - Configure SoC-specific prefetcher settings for Qualcomm's "MDSS"

  ARM-SMMU-v3 changes:
   - Improve CMDQ locking fairness for pathetically small queue sizes
   - Remove tracking of the IAS as this is only relevant for AArch32 and
     was causing C_BAD_STE errors
   - Add device-tree support for NVIDIA's CMDQV extension
   - Allow some hitless transitions for the 'MEV' and 'EATS' STE fields
   - Don't disable ATS for nested S1-bypass nested domains
   - Additions to the kunit selftests"

* tag 'iommu-updates-v7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (54 commits)
  iommupt: Always add IOVA range to iotlb_gather in gather_range_pages()
  iommu/amd: serialize sequence allocation under concurrent TLB invalidations
  iommu/amd: Fix type of type parameter to amd_iommufd_hw_info()
  iommu/arm-smmu-v3: Do not set disable_ats unless vSTE is Translate
  iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage
  iommu/arm-smmu-v3: Mark EATS_TRANS safe when computing the update sequence
  iommu/arm-smmu-v3: Mark STE MEV safe when computing the update sequence
  iommu/arm-smmu-v3: Add update_safe bits to fix STE update sequence
  iommu/arm-smmu-v3: Add device-tree support for CMDQV driver
  iommu/tegra241-cmdqv: Decouple driver from ACPI
  iommu/arm-smmu-qcom: Restore ACTLR settings for MDSS on sa8775p
  iommu/vt-d: Fix race condition during PASID entry replacement
  iommu/vt-d: Clear Present bit before tearing down context entry
  iommu/vt-d: Clear Present bit before tearing down PASID entry
  iommu/vt-d: Flush piotlb for SVM and Nested domain
  iommu/vt-d: Flush cache for PASID table before using it
  iommu/vt-d: Flush dev-IOTLB only when PCIe device is accessible in scalable mode
  iommu/vt-d: Skip dev-iotlb flush for inaccessible PCIe device without scalable mode
  rust: iommu: fix `srctree` link warning
  rust: iommu: fix Rust formatting
  ...
parents c22e26bd ad095636
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+9 −0
Original line number Diff line number Diff line
@@ -2680,6 +2680,15 @@ Kernel parameters
			1 - Bypass the IOMMU for DMA.
			unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH.

	iommu.debug_pagealloc=
			[KNL,EARLY] When CONFIG_IOMMU_DEBUG_PAGEALLOC is set, this
			parameter enables the feature at boot time. By default, it
			is disabled and the system behaves the same way as a kernel
			built without CONFIG_IOMMU_DEBUG_PAGEALLOC.
			Format: { "0" | "1" }
			0 - Sanitizer disabled.
			1 - Sanitizer enabled, expect runtime overhead.

	io7=		[HW] IO7 for Marvel-based Alpha systems
			See comment before marvel_specify_io7 in
			arch/alpha/kernel/core_marvel.c.
+1 −0
Original line number Diff line number Diff line
@@ -13346,6 +13346,7 @@ F: drivers/iommu/
F:	include/linux/iommu.h
F:	include/linux/iova.h
F:	include/linux/of_iommu.h
F:	rust/kernel/iommu/
IOMMUFD
M:	Jason Gunthorpe <jgg@nvidia.com>
+19 −0
Original line number Diff line number Diff line
@@ -384,6 +384,25 @@ config SPRD_IOMMU

	  Say Y here if you want to use the multimedia devices listed above.

config IOMMU_DEBUG_PAGEALLOC
	bool "Debug IOMMU mappings against page allocations"
	depends on DEBUG_PAGEALLOC && IOMMU_API && PAGE_EXTENSION
	help
	  This enables a consistency check between the kernel page allocator and
	  the IOMMU subsystem. It verifies that pages being allocated or freed
	  are not currently mapped in any IOMMU domain.

	  This helps detect DMA use-after-free bugs where a driver frees a page
	  but forgets to unmap it from the IOMMU, potentially allowing a device
	  to overwrite memory that the kernel has repurposed.

	  These checks are best-effort and may not detect all problems.

	  Due to performance overhead, this feature is disabled by default.
	  You must enable "iommu.debug_pagealloc" from the kernel command
	  line to activate the runtime checks.

	  If unsure, say N.
endif # IOMMU_SUPPORT

source "drivers/iommu/generic_pt/Kconfig"
+1 −0
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@@ -36,3 +36,4 @@ obj-$(CONFIG_IOMMU_SVA) += iommu-sva.o
obj-$(CONFIG_IOMMU_IOPF) += io-pgfault.o
obj-$(CONFIG_SPRD_IOMMU) += sprd-iommu.o
obj-$(CONFIG_APPLE_DART) += apple-dart.o
obj-$(CONFIG_IOMMU_DEBUG_PAGEALLOC) += iommu-debug-pagealloc.o
+10 −0
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@@ -30,6 +30,16 @@ config AMD_IOMMU
	  your BIOS for an option to enable it or if you have an IVRS ACPI
	  table.

config AMD_IOMMU_IOMMUFD
	bool "Enable IOMMUFD features for AMD IOMMU (EXPERIMENTAL)"
	depends on IOMMUFD
	depends on AMD_IOMMU
	help
	  Support for IOMMUFD features intended to support virtual machines
	  with accelerated virtual IOMMUs.

	  Say Y here if you are doing development and testing on this feature.

config AMD_IOMMU_DEBUGFS
	bool "Enable AMD IOMMU internals in DebugFS"
	depends on AMD_IOMMU && IOMMU_DEBUGFS
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