Commit 2029b3d7 authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher
Browse files

drm/amdgpu/mes: add multiple mes ring instances support 



Add multiple mes ring instances in mes structure to support
multiple mes pipes.

Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit c7d43556)
parent 278e1865

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+2 −2
Original line number Diff line number Diff line
@@ -995,7 +995,7 @@ uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg, uint32_t xcc_ 
	if (amdgpu_device_skip_hw_access(adev))

		return 0;



	if (adev->mes.ring.sched.ready)

	if (adev->mes.ring[0].sched.ready)

		return amdgpu_mes_rreg(adev, reg);



	BUG_ON(!ring->funcs->emit_rreg);
@@ -1065,7 +1065,7 @@ void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, uint3 
	if (amdgpu_device_skip_hw_access(adev))

		return;



	if (adev->mes.ring.sched.ready) {

	if (adev->mes.ring[0].sched.ready) {

		amdgpu_mes_wreg(adev, reg, v);

		return;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

+3 −2
Original line number Diff line number Diff line
@@ -589,7 +589,8 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev) 
		ring = adev->rings[i];

		vmhub = ring->vm_hub;



		if (ring == &adev->mes.ring ||

		if (ring == &adev->mes.ring[0] ||

		    ring == &adev->mes.ring[1] ||

		    ring == &adev->umsch_mm.ring)

			continue;
@@ -761,7 +762,7 @@ void amdgpu_gmc_fw_reg_write_reg_wait(struct amdgpu_device *adev, 
	unsigned long flags;

	uint32_t seq;



	if (adev->mes.ring.sched.ready) {

	if (adev->mes.ring[0].sched.ready) {

		amdgpu_mes_reg_write_reg_wait(adev, reg0, reg1,

					      ref, mask);

		return;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

+3 −1
Original line number Diff line number Diff line
@@ -135,9 +135,11 @@ int amdgpu_mes_init(struct amdgpu_device *adev) 
	idr_init(&adev->mes.queue_id_idr);

	ida_init(&adev->mes.doorbell_ida);

	spin_lock_init(&adev->mes.queue_id_lock);

	spin_lock_init(&adev->mes.ring_lock);

	mutex_init(&adev->mes.mutex_hidden);



	for (i = 0; i < AMDGPU_MAX_MES_PIPES; i++)

		spin_lock_init(&adev->mes.ring_lock[i]);



	adev->mes.total_max_queue = AMDGPU_FENCE_MES_QUEUE_ID_MASK;

	adev->mes.vmid_mask_mmhub = 0xffffff00;

	adev->mes.vmid_mask_gfxhub = 0xffffff00;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

+2 −2
Original line number Diff line number Diff line
@@ -82,8 +82,8 @@ struct amdgpu_mes { 
	uint64_t                        default_process_quantum;

	uint64_t                        default_gang_quantum;



	struct amdgpu_ring              ring;

	spinlock_t                      ring_lock;

	struct amdgpu_ring              ring[AMDGPU_MAX_MES_PIPES];

	spinlock_t                      ring_lock[AMDGPU_MAX_MES_PIPES];



	const struct firmware           *fw[AMDGPU_MAX_MES_PIPES];

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

+1 −1
Original line number Diff line number Diff line
@@ -858,7 +858,7 @@ void amdgpu_virt_post_reset(struct amdgpu_device *adev) 
		adev->gfx.is_poweron = false;

	}



	adev->mes.ring.sched.ready = false;

	adev->mes.ring[0].sched.ready = false;

}



bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev, uint32_t ucode_id)