Unverified Commit 2096d3ec authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v6.7/fixes-signed' of... 

Merge tag 'omap-for-v6.7/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps

A few fixes for omaps:

- A regression fix for ti-sysc interconnect target module driver to not access
  registers after reset if srst_udelay quirk is needed

- DRA7 L3 NoC node register size fix

* tag 'omap-for-v6.7/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix null pointer dereference and memory leak in omap_soc_device_init
  ARM: dts: dra7: Fix DRA7 L3 NoC node register size
  bus: ti-sysc: Flush posted write only after srst_udelay

Link: https://lore.kernel.org/r/pull-1702037799-781982@atomide.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d73ad797 c72b9c33

arch/arm/boot/dts/ti/omap/dra7.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ ocp: ocp { 


		l3-noc@44000000 {

			compatible = "ti,dra7-l3-noc";

			reg = <0x44000000 0x1000>,

			reg = <0x44000000 0x1000000>,

			      <0x45000000 0x1000>;

			interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

					      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/mach-omap2/id.c

+5 −0
Original line number Diff line number Diff line
@@ -793,11 +793,16 @@ void __init omap_soc_device_init(void) 


	soc_dev_attr->machine  = soc_name;

	soc_dev_attr->family   = omap_get_family();

	if (!soc_dev_attr->family) {

		kfree(soc_dev_attr);

		return;

	}

	soc_dev_attr->revision = soc_rev;

	soc_dev_attr->custom_attr_group = omap_soc_groups[0];



	soc_dev = soc_device_register(soc_dev_attr);

	if (IS_ERR(soc_dev)) {

		kfree(soc_dev_attr->family);

		kfree(soc_dev_attr);

		return;

	}

drivers/bus/ti-sysc.c

+14 −4
Original line number Diff line number Diff line
@@ -2158,13 +2158,23 @@ static int sysc_reset(struct sysc *ddata) 
		sysc_val = sysc_read_sysconfig(ddata);

		sysc_val |= sysc_mask;

		sysc_write(ddata, sysc_offset, sysc_val);

		/* Flush posted write */

		sysc_val = sysc_read_sysconfig(ddata);

	}



		/*

		 * Some devices need a delay before reading registers

		 * after reset. Presumably a srst_udelay is not needed

		 * for devices that use a rstctrl register reset.

		 */

		if (ddata->cfg.srst_udelay)

			fsleep(ddata->cfg.srst_udelay);



		/*

		 * Flush posted write. For devices needing srst_udelay

		 * this should trigger an interconnect error if the

		 * srst_udelay value is needed but not configured.

		 */

		sysc_val = sysc_read_sysconfig(ddata);

	}



	if (ddata->post_reset_quirk)

		ddata->post_reset_quirk(ddata);