Commit 214faf07 authored by Yassine Oudjana's avatar Yassine Oudjana Committed by Bjorn Andersson
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arm64: dts: qcom: msm8996: Add blsp2_i2c3 



Add a node for blsp2_i2c3 which is used for type-C port control chips
and speaker codecs on some devices.

Signed-off-by: default avatarYassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210901193214.250375-3-y.oudjana@protonmail.com
parent c57b4247

arch/arm64/boot/dts/qcom/msm8996.dtsi

+32 −0
Original line number Diff line number Diff line
@@ -1253,6 +1253,20 @@ blsp2_uart3_4pins_sleep: blsp2-uart2-4pins-sleep { 
				bias-disable;

			};



			blsp2_i2c3_default: blsp2-i2c3 {

				pins = "gpio51", "gpio52";

				function = "blsp_i2c9";

				drive-strength = <16>;

				bias-disable;

			};



			blsp2_i2c3_sleep: blsp2-i2c3-sleep {

				pins = "gpio51", "gpio52";

				function = "gpio";

				drive-strength = <2>;

				bias-disable;

			};



			wcd_intr_default: wcd-intr-default{

				pins = "gpio54";

				function = "gpio";
@@ -2825,6 +2839,24 @@ blsp2_i2c2: i2c@75b6000 { 
			status = "disabled";

		};



		blsp2_i2c3: i2c@75b7000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x075b7000 0x1000>;

			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP2_AHB_CLK>,

				<&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>;

			clock-names = "iface", "core";

			clock-frequency = <400000>;

			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&blsp2_i2c3_default>;

			pinctrl-1 = <&blsp2_i2c3_sleep>;

			dmas = <&blsp2_dma 16>, <&blsp2_dma 17>;

			dma-names = "tx", "rx";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		blsp2_i2c5: i2c@75b9000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x75b9000 0x1000>;