Commit 2150c87d authored by Arnaud Vrac's avatar Arnaud Vrac Committed by Bjorn Andersson
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arm64: dts: qcom: msm8998: add HDMI nodes



Add HDMI controller and PHY nodes, ported from vendor code.

Signed-off-by: default avatarArnaud Vrac <avrac@freebox.fr>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarMarc Gonzalez <mgonzalez@freebox.fr>
Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-6-e44a20553464@freebox.fr


[bjorn: Updated commit message]
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 1b97f00d
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+99 −1
Original line number Diff line number Diff line
@@ -2794,7 +2794,7 @@ mmcc: clock-controller@c8c0000 {
				 <&mdss_dsi0_phy 0>,
				 <&mdss_dsi1_phy 1>,
				 <&mdss_dsi1_phy 0>,
				 <0>,
				 <&mdss_hdmi_phy 0>,
				 <0>,
				 <0>,
				 <&gcc GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2899,6 +2899,14 @@ dpu_intf2_out: endpoint {
							remote-endpoint = <&mdss_dsi1_in>;
						};
					};

					port@2 {
						reg = <2>;

						dpu_intf3_out: endpoint {
							remote-endpoint = <&hdmi_in>;
						};
					};
				};
			};

@@ -3054,6 +3062,96 @@ mdss_dsi1_phy: phy@c996400 {

				status = "disabled";
			};

			mdss_hdmi: hdmi-tx@c9a0000 {
				compatible = "qcom,hdmi-tx-8998";
				reg =	<0x0c9a0000 0x50c>,
					<0x00780000 0x6220>,
					<0x0c9e0000 0x2c>;
				reg-names = "core_physical",
					    "qfprom_physical",
					    "hdcp_physical";

				interrupt-parent = <&mdss>;
				interrupts = <8>;

				clocks = <&mmcc MDSS_MDP_CLK>,
					 <&mmcc MDSS_AHB_CLK>,
					 <&mmcc MDSS_HDMI_CLK>,
					 <&mmcc MDSS_HDMI_DP_AHB_CLK>,
					 <&mmcc MDSS_EXTPCLK_CLK>,
					 <&mmcc MDSS_AXI_CLK>,
					 <&mmcc MNOC_AHB_CLK>,
					 <&mmcc MISC_AHB_CLK>;
				clock-names =
					"mdp_core",
					"iface",
					"core",
					"alt_iface",
					"extp",
					"bus",
					"mnoc",
					"iface_mmss";

				phys = <&mdss_hdmi_phy>;
				#sound-dai-cells = <1>;

				pinctrl-0 = <&hdmi_hpd_default>,
					    <&hdmi_ddc_default>,
					    <&hdmi_cec_default>;
				pinctrl-1 = <&hdmi_hpd_sleep>,
					    <&hdmi_ddc_default>,
					    <&hdmi_cec_default>;
				pinctrl-names = "default", "sleep";

				status = "disabled";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;
						hdmi_in: endpoint {
							remote-endpoint = <&dpu_intf3_out>;
						};
					};

					port@1 {
						reg = <1>;
						hdmi_out: endpoint {
						};
					};
				};
			};

			mdss_hdmi_phy: hdmi-phy@c9a0600 {
				compatible = "qcom,hdmi-phy-8998";
				reg = <0x0c9a0600 0x18b>,
				      <0x0c9a0a00 0x38>,
				      <0x0c9a0c00 0x38>,
				      <0x0c9a0e00 0x38>,
				      <0x0c9a1000 0x38>,
				      <0x0c9a1200 0x0e8>;
				reg-names = "hdmi_pll",
					    "hdmi_tx_l0",
					    "hdmi_tx_l1",
					    "hdmi_tx_l2",
					    "hdmi_tx_l3",
					    "hdmi_phy";

				#clock-cells = <0>;
				#phy-cells = <0>;

				clocks = <&mmcc MDSS_AHB_CLK>,
					 <&gcc GCC_HDMI_CLKREF_CLK>,
					 <&rpmcc RPM_SMD_XO_CLK_SRC>;
				clock-names = "iface",
					      "ref",
					      "xo";

				status = "disabled";
			};
		};

		venus: video-codec@cc00000 {