Commit 21b01cb8 authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski
Browse files

net: stmmac: visconti: convert to set_clk_tx_rate() method 



Convert visconti to use the set_clk_tx_rate() method. By doing so,
the GMAC control register will already have been updated (unlike with
the fix_mac_speed() method) so this code can be removed while porting
to the set_clk_tx_rate() method.

There is also no need for the spinlock, and has never been - neither
fix_mac_speed() nor set_clk_tx_rate() can be called by more than one
thread at a time, so the lock does nothing useful.

Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Acked-by: default avatarNobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1u5SiQ-001I0B-OQ@rmk-PC.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent f7ca6120

drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c

+6 −19
Original line number Diff line number Diff line
@@ -51,21 +51,14 @@ struct visconti_eth { 
	u32 phy_intf_sel;

	struct clk *phy_ref_clk;

	struct device *dev;

	spinlock_t lock; /* lock to protect register update */

};



static void visconti_eth_fix_mac_speed(void *priv, int speed, unsigned int mode)

static int visconti_eth_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

					phy_interface_t interface, int speed)

{

	struct visconti_eth *dwmac = priv;

	struct visconti_eth *dwmac = bsp_priv;

	struct net_device *netdev = dev_get_drvdata(dwmac->dev);

	unsigned int val, clk_sel_val = 0;

	unsigned long flags;



	spin_lock_irqsave(&dwmac->lock, flags);



	/* adjust link */

	val = readl(dwmac->reg + MAC_CTRL_REG);

	val &= ~(GMAC_CONFIG_PS | GMAC_CONFIG_FES);



	switch (speed) {

	case SPEED_1000:
@@ -77,24 +70,19 @@ static void visconti_eth_fix_mac_speed(void *priv, int speed, unsigned int mode) 
			clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_25M;

		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RMII)

			clk_sel_val = ETHER_CLK_SEL_DIV_SEL_2;

		val |= GMAC_CONFIG_PS | GMAC_CONFIG_FES;

		break;

	case SPEED_10:

		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII)

			clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_2P5M;

		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RMII)

			clk_sel_val = ETHER_CLK_SEL_DIV_SEL_20;

		val |= GMAC_CONFIG_PS;

		break;

	default:

		/* No bit control */

		netdev_err(netdev, "Unsupported speed request (%d)", speed);

		spin_unlock_irqrestore(&dwmac->lock, flags);

		return;

		return -EINVAL;

	}



	writel(val, dwmac->reg + MAC_CTRL_REG);



	/* Stop internal clock */

	val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);

	val &= ~(ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN);
@@ -136,7 +124,7 @@ static void visconti_eth_fix_mac_speed(void *priv, int speed, unsigned int mode) 
		break;

	}



	spin_unlock_irqrestore(&dwmac->lock, flags);

	return 0;

}



static int visconti_eth_init_hw(struct platform_device *pdev, struct plat_stmmacenet_data *plat_dat)
@@ -228,11 +216,10 @@ static int visconti_eth_dwmac_probe(struct platform_device *pdev) 
	if (!dwmac)

		return -ENOMEM;



	spin_lock_init(&dwmac->lock);

	dwmac->reg = stmmac_res.addr;

	dwmac->dev = &pdev->dev;

	plat_dat->bsp_priv = dwmac;

	plat_dat->fix_mac_speed = visconti_eth_fix_mac_speed;

	plat_dat->set_clk_tx_rate = visconti_eth_set_clk_tx_rate;



	ret = visconti_eth_clock_probe(pdev, plat_dat);

	if (ret)