Commit 22664436 authored by YiPeng Chai's avatar YiPeng Chai Committed by Alex Deucher
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drm/amd/ras: Add unified interface to handle ras interrupts 



Add unified interface to handle ras interrupts, some redundant
interrupt function interfaces will be removed later.

Signed-off-by: default avatarYiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2886b439

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

+31 −0
Original line number Diff line number Diff line
@@ -535,6 +535,37 @@ int amdgpu_ras_mgr_handle_controller_interrupt(struct amdgpu_device *adev, void 
	return ret;

}



int amdgpu_ras_mgr_dispatch_interrupt(struct amdgpu_device *adev, struct ras_ih_info *ih_info)

{

	struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev);

	uint64_t seq_no = 0;

	int ret = 0;



	if (!amdgpu_ras_mgr_is_ready(adev))

		return -EPERM;



	if (!ih_info)

		return 0;



	if (ih_info->block == RAS_BLOCK_ID__UMC) {

		if (ras_mgr->ras_core->poison_supported) {

			seq_no = amdgpu_ras_mgr_gen_ras_event_seqno(adev, RAS_SEQNO_TYPE_DE);

			RAS_DEV_INFO(adev,

				"{%llu} RAS poison is created, no user action is needed.\n",

				seq_no);

		}



		ret = amdgpu_ras_process_handle_umc_interrupt(adev, ih_info);

	} else if (ras_mgr->ras_core->poison_supported) {

		ret = amdgpu_ras_process_handle_consumption_interrupt(adev, ih_info);

	} else {

		RAS_DEV_WARN(adev,

			"No RAS interrupt handler for non-UMC block with poison disabled.\n");

	}



	return ret;

}



int amdgpu_ras_mgr_handle_consumer_interrupt(struct amdgpu_device *adev, void *data)

{

	if (!amdgpu_ras_mgr_is_ready(adev))

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ bool amdgpu_uniras_enabled(struct amdgpu_device *adev); 
int amdgpu_ras_mgr_handle_fatal_interrupt(struct amdgpu_device *adev, void *data);

int amdgpu_ras_mgr_handle_controller_interrupt(struct amdgpu_device *adev, void *data);

int amdgpu_ras_mgr_handle_consumer_interrupt(struct amdgpu_device *adev, void *data);

int amdgpu_ras_mgr_dispatch_interrupt(struct amdgpu_device *adev, struct ras_ih_info *ih_info);

int amdgpu_ras_mgr_update_ras_ecc(struct amdgpu_device *adev);

int amdgpu_ras_mgr_reset_gpu(struct amdgpu_device *adev, uint32_t flags);

uint64_t amdgpu_ras_mgr_gen_ras_event_seqno(struct amdgpu_device *adev,