Commit 227e1ac0 authored by Rob Herring (Arm)'s avatar Rob Herring (Arm)
Browse files

dt-bindings: clock: mediatek: Drop duplicate mediatek,mt6795-sys-clock.yaml 



The compatible strings for mt6795 clocks are also documented in other
schemas:

"mediatek,mt6795-apmixedsys" in clock/mediatek,apmixedsys.yaml
"mediatek,mt6795-topckgen" in clock/mediatek,topckgen.yaml
"mediatek,mt6795-pericfg" in clock/mediatek,pericfg.yaml
"mediatek,mt6795-infracfg" in clock/mediatek,infracfg.yaml

The only difference is #reset-cells is not allowed in some of these,
but that aligns with actual users in .dts files.

Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240910234238.1028422-1-robh@kernel.org


Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent 0423cace

Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml

deleted100644 → 0
+0 −54
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek System Clock Controller for MT6795



maintainers:

  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

  - Chun-Jie Chen <chun-jie.chen@mediatek.com>



description:

  The Mediatek system clock controller provides various clocks and system

  configuration like reset and bus protection on MT6795.



properties:

  compatible:

    items:

      - enum:

          - mediatek,mt6795-apmixedsys

          - mediatek,mt6795-infracfg

          - mediatek,mt6795-pericfg

          - mediatek,mt6795-topckgen

      - const: syscon



  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        topckgen: clock-controller@10000000 {

            compatible = "mediatek,mt6795-topckgen", "syscon";

            reg = <0 0x10000000 0 0x1000>;

            #clock-cells = <1>;

        };

    };