Commit 22d169bd authored by Dmytro Maluka's avatar Dmytro Maluka Committed by Joerg Roedel
Browse files

iommu/vt-d: Flush cache for PASID table before using it 



When writing the address of a freshly allocated zero-initialized PASID
table to a PASID directory entry, do that after the CPU cache flush for
this PASID table, not before it, to avoid the time window when this
PASID table may be already used by non-coherent IOMMU hardware while
its contents in RAM is still some random old data, not zero-initialized.

Fixes: 194b3348 ("iommu/vt-d: Fix PASID directory pointer coherency")
Signed-off-by: default avatarDmytro Maluka <dmaluka@chromium.org>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20251221123508.37495-1-dmaluka@chromium.org


Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 10e60d87

drivers/iommu/intel/pasid.c

+4 −3
Original line number Diff line number Diff line
@@ -153,6 +153,9 @@ static struct pasid_entry *intel_pasid_get_entry(struct device *dev, u32 pasid) 
		if (!entries)

			return NULL;



		if (!ecap_coherent(info->iommu->ecap))

			clflush_cache_range(entries, VTD_PAGE_SIZE);



		/*

		 * The pasid directory table entry won't be freed after

		 * allocation. No worry about the race with free and
@@ -165,11 +168,9 @@ static struct pasid_entry *intel_pasid_get_entry(struct device *dev, u32 pasid) 
			iommu_free_pages(entries);

			goto retry;

		}

		if (!ecap_coherent(info->iommu->ecap)) {

			clflush_cache_range(entries, VTD_PAGE_SIZE);

		if (!ecap_coherent(info->iommu->ecap))

			clflush_cache_range(&dir[dir_index].val, sizeof(*dir));

	}

	}



	return &entries[index];

}