Commit 22e170e9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-fixes-2026-05-07' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes 



UAPI Changes:

Cross-subsystem Changes:

Core Changes:

Driver Changes:
- Add NULL check for media_gt in intel_hdcp_gsc_check_status (Gustavo)
- Fix EAGAIN sign in pf_migration_consume (Shuicheng)
- Fix MMIO access using PF view instead of VF view during migration (Shuicheng)
- Exclude indirect ring state page from ADS engine state size (Satya)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/afw5lsrjE4pStEml@gsse-cloud1.jf.intel.com
parents 17dd4d44 b29987df

drivers/gpu/drm/xe/display/xe_hdcp_gsc.c

+10 −2
Original line number Diff line number Diff line
@@ -37,9 +37,17 @@ static bool intel_hdcp_gsc_check_status(struct drm_device *drm) 
	struct xe_device *xe = to_xe_device(drm);

	struct xe_tile *tile = xe_device_get_root_tile(xe);

	struct xe_gt *gt = tile->media_gt;

	struct xe_gsc *gsc = &gt->uc.gsc;

	struct xe_gsc *gsc;



	if (!gt) {

		drm_dbg_kms(&xe->drm,

			    "not checking GSC status for HDCP2.x: media GT not present or disabled\n");

		return false;

	}



	gsc = &gt->uc.gsc;



	if (!gsc || !xe_uc_fw_is_available(&gsc->fw)) {

	if (!xe_uc_fw_is_available(&gsc->fw)) {

		drm_dbg_kms(&xe->drm,

			    "GSC Components not ready for HDCP2.x\n");

		return false;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

+4 −4
Original line number Diff line number Diff line
@@ -385,10 +385,10 @@ static int pf_migration_mmio_save(struct xe_gt *gt, unsigned int vfid, void *buf 


	if (xe_gt_is_media_type(gt))

		for (n = 0; n < MED_VF_SW_FLAG_COUNT; n++)

			regs[n] = xe_mmio_read32(&gt->mmio, MED_VF_SW_FLAG(n));

			regs[n] = xe_mmio_read32(&mmio, MED_VF_SW_FLAG(n));

	else

		for (n = 0; n < VF_SW_FLAG_COUNT; n++)

			regs[n] = xe_mmio_read32(&gt->mmio, VF_SW_FLAG(n));

			regs[n] = xe_mmio_read32(&mmio, VF_SW_FLAG(n));



	return 0;

}
@@ -407,10 +407,10 @@ static int pf_migration_mmio_restore(struct xe_gt *gt, unsigned int vfid, 


	if (xe_gt_is_media_type(gt))

		for (n = 0; n < MED_VF_SW_FLAG_COUNT; n++)

			xe_mmio_write32(&gt->mmio, MED_VF_SW_FLAG(n), regs[n]);

			xe_mmio_write32(&mmio, MED_VF_SW_FLAG(n), regs[n]);

	else

		for (n = 0; n < VF_SW_FLAG_COUNT; n++)

			xe_mmio_write32(&gt->mmio, VF_SW_FLAG(n), regs[n]);

			xe_mmio_write32(&mmio, VF_SW_FLAG(n), regs[n]);



	return 0;

}

drivers/gpu/drm/xe/xe_guc_ads.c

+1 −4
Original line number Diff line number Diff line
@@ -512,12 +512,9 @@ static void guc_golden_lrc_init(struct xe_guc_ads *ads) 
		 * that starts after the execlists LRC registers. This is

		 * required to allow the GuC to restore just the engine state

		 * when a watchdog reset occurs.

		 * We calculate the engine state size by removing the size of

		 * what comes before it in the context image (which is identical

		 * on all engines).

		 */

		ads_blob_write(ads, ads.eng_state_size[guc_class],

			       real_size - xe_lrc_skip_size(xe));

			       xe_lrc_engine_state_size(gt, class));

		ads_blob_write(ads, ads.golden_context_lrca[guc_class],

			       addr_ggtt);

drivers/gpu/drm/xe/xe_lrc.c

+9 −2
Original line number Diff line number Diff line
@@ -746,9 +746,16 @@ size_t xe_lrc_reg_size(struct xe_device *xe) 
		return 80 * sizeof(u32);

}



size_t xe_lrc_skip_size(struct xe_device *xe)

/**

 * xe_lrc_engine_state_size() - Get size of the engine state within LRC

 * @gt: the &xe_gt struct instance

 * @class: Hardware engine class

 *

 * Returns: Size of the engine state

 */

size_t xe_lrc_engine_state_size(struct xe_gt *gt, enum xe_engine_class class)

{

	return LRC_PPHWSP_SIZE + xe_lrc_reg_size(xe);

	return xe_gt_lrc_hang_replay_size(gt, class) - xe_lrc_reg_size(gt_to_xe(gt));

}



static inline u32 __xe_lrc_seqno_offset(struct xe_lrc *lrc)

drivers/gpu/drm/xe/xe_lrc.h

+1 −1
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ u32 xe_lrc_parallel_ggtt_addr(struct xe_lrc *lrc); 
struct iosys_map xe_lrc_parallel_map(struct xe_lrc *lrc);



size_t xe_lrc_reg_size(struct xe_device *xe);

size_t xe_lrc_skip_size(struct xe_device *xe);

size_t xe_lrc_engine_state_size(struct xe_gt *gt, enum xe_engine_class class);



void xe_lrc_dump_default(struct drm_printer *p,

			 struct xe_gt *gt,