Commit 2326c8f2 authored Jul 14, 2024 by Jiaxun Yang Committed by Thomas Bogendoerfer Jul 15, 2024

MIPS: Fix fallback march for SB1

Fallback march for SB1 should be mips64 instead of mips64r1.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202407111851.LwDasTcp-lkp@intel.com/

Fixes: bfc0a330 ("MIPS: Fallback CPU -march flag to ISA level if unsupported")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

parent 74beefb5

arch/mips/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -170,7 +170,7 @@ cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=mips4) \
		-Wa,--trap
		cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=mips4) \
		-Wa,--trap
		cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=mips64r1) \
		cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=mips64) \
		-Wa,--trap
		cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mdmx)
		cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mips3d)