Commit 239d0ccf authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amd/pm: fix smu v14 soft clock frequency setting issue 



v1:
resolve the issue where some freq frequencies cannot be set correctly
due to insufficient floating-point precision.

v2:
patch this convert on 'max' value only.

Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 53868dd8)
Cc: stable@vger.kernel.org
parent c764b7af

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h

+1 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ extern const int decoded_link_width[8]; 


#define DECODE_GEN_SPEED(gen_speed_idx)		(decoded_link_speed[gen_speed_idx])

#define DECODE_LANE_WIDTH(lane_width_idx)	(decoded_link_width[lane_width_idx])

#define SMU_V14_SOFT_FREQ_ROUND(x)	((x) + 1)



struct smu_14_0_max_sustainable_clocks {

	uint32_t display_clock;

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

+1 −0
Original line number Diff line number Diff line
@@ -1178,6 +1178,7 @@ int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, 
		return clk_id;



	if (max > 0) {

		max = SMU_V14_SOFT_FREQ_ROUND(max);

		if (automatic)

			param = (uint32_t)((clk_id << 16) | 0xffff);

		else