Commit 23be31bd authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8450-qrd: explicitly disable dispcc on the board 



A platform display clock controller is expected to be enabled by default
for all boards, however in particular cases preset display clock setting
is expected. To avoid any probable regression before enabling display
clock controller for all SM8450 platforms disable it for SM8450-QRD board
only.

Signed-off-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-3-vladimir.zapolskiy@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 4bd9b84e

arch/arm64/boot/dts/qcom/sm8450-qrd.dts

+4 −0
Original line number Diff line number Diff line
@@ -349,6 +349,10 @@ vreg_l6e_1p2: ldo6 { 
	};

};



&dispcc {

	status = "disabled";

};



&pcie0 {

	status = "okay";

};