Loading drivers/char/agp/intel-gtt.c +0 −5 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ #include <asm/smp.h> #include "agp.h" #include "intel-agp.h" #include <linux/intel-gtt.h> #include <drm/intel-gtt.h> /* Loading @@ -39,10 +38,6 @@ #define USE_PCI_DMA_API 0 #endif #define AGP_DCACHE_MEMORY 1 #define AGP_PHYS_MEMORY 2 #define INTEL_AGP_CACHED_MEMORY 3 struct intel_gtt_driver { unsigned int gen : 8; unsigned int is_g33 : 1; Loading drivers/gpu/drm/i915/i915_gem.c +0 −1 Original line number Diff line number Diff line Loading @@ -34,7 +34,6 @@ #include <linux/slab.h> #include <linux/swap.h> #include <linux/pci.h> #include <linux/intel-gtt.h> struct change_domains { uint32_t invalidate_domains; Loading include/drm/intel-gtt.h +12 −0 Original line number Diff line number Diff line Loading @@ -13,5 +13,17 @@ const struct intel_gtt { unsigned int gtt_mappable_entries; } *intel_gtt_get(void); /* Special gtt memory types */ #define AGP_DCACHE_MEMORY 1 #define AGP_PHYS_MEMORY 2 /* New caching attributes for gen6/sandybridge */ #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) /* flag for GFDT type */ #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) #endif include/linux/intel-gtt.hdeleted 100644 → 0 +0 −20 Original line number Diff line number Diff line /* * Common Intel AGPGART and GTT definitions. */ #ifndef _INTEL_GTT_H #define _INTEL_GTT_H #include <linux/agp_backend.h> /* This is for Intel only GTT controls. * * Sandybridge: AGP_USER_CACHED_MEMORY default to LLC only */ #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) /* flag for GFDT type */ #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) #endif Loading
drivers/char/agp/intel-gtt.c +0 −5 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ #include <asm/smp.h> #include "agp.h" #include "intel-agp.h" #include <linux/intel-gtt.h> #include <drm/intel-gtt.h> /* Loading @@ -39,10 +38,6 @@ #define USE_PCI_DMA_API 0 #endif #define AGP_DCACHE_MEMORY 1 #define AGP_PHYS_MEMORY 2 #define INTEL_AGP_CACHED_MEMORY 3 struct intel_gtt_driver { unsigned int gen : 8; unsigned int is_g33 : 1; Loading
drivers/gpu/drm/i915/i915_gem.c +0 −1 Original line number Diff line number Diff line Loading @@ -34,7 +34,6 @@ #include <linux/slab.h> #include <linux/swap.h> #include <linux/pci.h> #include <linux/intel-gtt.h> struct change_domains { uint32_t invalidate_domains; Loading
include/drm/intel-gtt.h +12 −0 Original line number Diff line number Diff line Loading @@ -13,5 +13,17 @@ const struct intel_gtt { unsigned int gtt_mappable_entries; } *intel_gtt_get(void); /* Special gtt memory types */ #define AGP_DCACHE_MEMORY 1 #define AGP_PHYS_MEMORY 2 /* New caching attributes for gen6/sandybridge */ #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) /* flag for GFDT type */ #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) #endif
include/linux/intel-gtt.hdeleted 100644 → 0 +0 −20 Original line number Diff line number Diff line /* * Common Intel AGPGART and GTT definitions. */ #ifndef _INTEL_GTT_H #define _INTEL_GTT_H #include <linux/agp_backend.h> /* This is for Intel only GTT controls. * * Sandybridge: AGP_USER_CACHED_MEMORY default to LLC only */ #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) /* flag for GFDT type */ #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) #endif