Commit 2555d4c6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

arm64: drop binutils version checks 



Now that gcc-8 and binutils-2.30 are the minimum versions, a lot of
the individual feature checks can go away for simplification.

Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 5f5305de

arch/arm64/Kconfig

+2 −35
Original line number Diff line number Diff line
@@ -642,9 +642,6 @@ config ARM64_ERRATUM_843419 


	  If unsure, say Y.



config ARM64_LD_HAS_FIX_ERRATUM_843419

	def_bool $(ld-option,--fix-cortex-a53-843419)



config ARM64_ERRATUM_1024718

	bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update"

	default y
@@ -1890,13 +1887,9 @@ config ARM64_PAN 
	  The feature is detected at runtime, and will remain as a 'nop'

	  instruction if the cpu does not implement the feature.



config AS_HAS_LSE_ATOMICS

	def_bool $(as-instr,.arch_extension lse)



config ARM64_LSE_ATOMICS

	bool

	default ARM64_USE_LSE_ATOMICS

	depends on AS_HAS_LSE_ATOMICS



config ARM64_USE_LSE_ATOMICS

	bool "Atomic instructions"
@@ -1908,20 +1901,12 @@ config ARM64_USE_LSE_ATOMICS 


	  Say Y here to make use of these instructions for the in-kernel

	  atomic routines. This incurs a small overhead on CPUs that do

	  not support these instructions and requires the kernel to be

	  built with binutils >= 2.25 in order for the new instructions

	  to be used.

	  not support these instructions.



endmenu # "ARMv8.1 architectural features"



menu "ARMv8.2 architectural features"



config AS_HAS_ARMV8_2

	def_bool $(cc-option,-Wa$(comma)-march=armv8.2-a)



config AS_HAS_SHA3

	def_bool $(as-instr,.arch armv8.2-a+sha3)



config ARM64_PMEM

	bool "Enable support for persistent memory"

	select ARCH_HAS_PMEM_API
@@ -1995,7 +1980,6 @@ config ARM64_PTR_AUTH_KERNEL 
	bool "Use pointer authentication for kernel"

	default y

	depends on ARM64_PTR_AUTH

	depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_ARMV8_3

	# Modern compilers insert a .note.gnu.property section note for PAC

	# which is only understood by binutils starting with version 2.33.1.

	depends on LD_IS_LLD || LD_VERSION >= 23301 || (CC_IS_GCC && GCC_VERSION < 90100)
@@ -2016,19 +2000,10 @@ config CC_HAS_BRANCH_PROT_PAC_RET 
	# GCC 9 or later, clang 8 or later

	def_bool $(cc-option,-mbranch-protection=pac-ret+leaf)



config CC_HAS_SIGN_RETURN_ADDRESS

	# GCC 7, 8

	def_bool $(cc-option,-msign-return-address=all)



config AS_HAS_ARMV8_3

	def_bool $(cc-option,-Wa$(comma)-march=armv8.3-a)



config AS_HAS_CFI_NEGATE_RA_STATE

	# binutils 2.34+

	def_bool $(as-instr,.cfi_startproc\n.cfi_negate_ra_state\n.cfi_endproc\n)



config AS_HAS_LDAPR

	def_bool $(as-instr,.arch_extension rcpc)



endmenu # "ARMv8.3 architectural features"



menu "ARMv8.4 architectural features"
@@ -2056,20 +2031,13 @@ config ARM64_AMU_EXTN 
	  correctly reflect reality. Most commonly, the value read will be 0,

	  indicating that the counter is not enabled.



config AS_HAS_ARMV8_4

	def_bool $(cc-option,-Wa$(comma)-march=armv8.4-a)



config ARM64_TLB_RANGE

	bool "Enable support for tlbi range feature"

	default y

	depends on AS_HAS_ARMV8_4

	help

	  ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a

	  range of input addresses.



	  The feature introduces new assembly instructions, and they were

	  support when binutils >= 2.30.



endmenu # "ARMv8.4 architectural features"



menu "ARMv8.5 architectural features"
@@ -2145,7 +2113,6 @@ config ARM64_MTE 
	default y

	depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI

	depends on AS_HAS_ARMV8_5

	depends on AS_HAS_LSE_ATOMICS

	# Required for tag checking in the uaccess routines

	select ARM64_PAN

	select ARCH_HAS_SUBPAGE_FAULTS

arch/arm64/Makefile

+2 −19
Original line number Diff line number Diff line
@@ -16,15 +16,12 @@ ifeq ($(CONFIG_RELOCATABLE), y) 
# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour

# for relative relocs, since this leads to better Image compression

# with the relocation offsets always being zero.

LDFLAGS_vmlinux		+= -shared -Bsymbolic -z notext \

			$(call ld-option, --no-apply-dynamic-relocs)

LDFLAGS_vmlinux	+= -shared -Bsymbolic -z notext --no-apply-dynamic-relocs

endif



ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)

  ifeq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)

LDFLAGS_vmlinux	+= --fix-cortex-a53-843419

endif

endif



cc_has_k_constraint := $(call try-run,echo				\

	'int main(void) {						\
@@ -105,12 +102,8 @@ endif 
# hardware.

ifeq ($(CONFIG_AS_HAS_ARMV8_5), y)

  asm-arch := armv8.5-a

else ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)

else

  asm-arch := armv8.4-a

else ifeq ($(CONFIG_AS_HAS_ARMV8_3), y)

  asm-arch := armv8.3-a

else ifeq ($(CONFIG_AS_HAS_ARMV8_2), y)

  asm-arch := armv8.2-a

endif



ifdef asm-arch
@@ -201,16 +194,6 @@ install zinstall: 


archprepare:

	$(Q)$(MAKE) $(build)=arch/arm64/tools kapi

ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)

  ifneq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)

	@echo "warning: ld does not support --fix-cortex-a53-843419; kernel may be susceptible to erratum" >&2

  endif

endif

ifeq ($(CONFIG_ARM64_USE_LSE_ATOMICS),y)

  ifneq ($(CONFIG_ARM64_LSE_ATOMICS),y)

	@echo "warning: LSE atomics not supported by binutils" >&2

  endif

endif



ifeq ($(KBUILD_EXTMOD),)

# We need to generate vdso-offsets.h before compiling certain files in kernel/.

arch/arm64/include/asm/rwonce.h

+0 −4
Original line number Diff line number Diff line
@@ -12,16 +12,12 @@ 


#ifndef BUILD_VDSO



#ifdef CONFIG_AS_HAS_LDAPR

#define __LOAD_RCPC(sfx, regs...)					\

	ALTERNATIVE(							\

		"ldar"	#sfx "\t" #regs,				\

		".arch_extension rcpc\n"				\

		"ldapr"	#sfx "\t" #regs,				\

	ARM64_HAS_LDAPR)

#else

#define __LOAD_RCPC(sfx, regs...)	"ldar" #sfx "\t" #regs

#endif /* CONFIG_AS_HAS_LDAPR */



/*

 * When building with LTO, there is an increased risk of the compiler

arch/arm64/kvm/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@ if VIRTUALIZATION 


menuconfig KVM

	bool "Kernel-based Virtual Machine (KVM) support"

	depends on AS_HAS_ARMV8_4

	select KVM_COMMON

	select KVM_GENERIC_HARDWARE_ENABLING

	select KVM_GENERIC_MMU_NOTIFIER

arch/arm64/lib/xor-neon.c

+1 −1
Original line number Diff line number Diff line
@@ -319,7 +319,7 @@ static void xor_arm64_eor3_5(unsigned long bytes, 


static int __init xor_neon_init(void)

{

	if (IS_ENABLED(CONFIG_AS_HAS_SHA3) && cpu_have_named_feature(SHA3)) {

	if (cpu_have_named_feature(SHA3)) {

		xor_block_inner_neon.do_3 = xor_arm64_eor3_3;

		xor_block_inner_neon.do_4 = xor_arm64_eor3_4;

		xor_block_inner_neon.do_5 = xor_arm64_eor3_5;