Commit 266f7a0f authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Paolo Abeni
Browse files

dt-bindings: net: airoha: Add the NPU node for EN7581 SoC 



This patch adds the NPU document binding for EN7581 SoC.
The Airoha Network Processor Unit (NPU) provides a configuration interface
to implement wired and wireless hardware flow offloading programming Packet
Processor Engine (PPE) flow table.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent c28b8375

Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Airoha Network Processor Unit for EN7581 SoC



maintainers:

  - Lorenzo Bianconi <lorenzo@kernel.org>



description:

  The Airoha Network Processor Unit (NPU) provides a configuration interface

  to implement wired and wireless hardware flow offloading programming Packet

  Processor Engine (PPE) flow table.



properties:

  compatible:

    enum:

      - airoha,en7581-npu



  reg:

    maxItems: 1



  interrupts:

    items:

      - description: mbox host irq line

      - description: watchdog0 irq line

      - description: watchdog1 irq line

      - description: watchdog2 irq line

      - description: watchdog3 irq line

      - description: watchdog4 irq line

      - description: watchdog5 irq line

      - description: watchdog6 irq line

      - description: watchdog7 irq line

      - description: wlan irq line0

      - description: wlan irq line1

      - description: wlan irq line2

      - description: wlan irq line3

      - description: wlan irq line4

      - description: wlan irq line5



  memory-region:

    maxItems: 1

    description:

      Memory used to store NPU firmware binary.



required:

  - compatible

  - reg

  - interrupts

  - memory-region



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    soc {

      #address-cells = <2>;

      #size-cells = <2>;



      npu@1e900000 {

        compatible = "airoha,en7581-npu";

        reg = <0 0x1e900000 0 0x313000>;

        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

        memory-region = <&npu_binary>;

      };

    };