Commit 26d0ecc7 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to DSPLINOFF 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPLINOFF register macro.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/922b6b0795787b335bd3d5b0541bd30dc2c19dd5.1716469091.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent c09b5ddb

drivers/gpu/drm/i915/display/i9xx_plane.c

+2 −2
Original line number Diff line number Diff line
@@ -485,7 +485,7 @@ static void i9xx_plane_update_arm(struct intel_plane *plane, 
		intel_de_write_fw(dev_priv, DSPOFFSET(i9xx_plane),

				  DISP_OFFSET_Y(y) | DISP_OFFSET_X(x));

	} else if (DISPLAY_VER(dev_priv) >= 4) {

		intel_de_write_fw(dev_priv, DSPLINOFF(i9xx_plane),

		intel_de_write_fw(dev_priv, DSPLINOFF(dev_priv, i9xx_plane),

				  linear_offset);

		intel_de_write_fw(dev_priv, DSPTILEOFF(i9xx_plane),

				  DISP_OFFSET_Y(y) | DISP_OFFSET_X(x));
@@ -1041,7 +1041,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, 
					       DSPTILEOFF(i9xx_plane));

		else

			offset = intel_de_read(dev_priv,

					       DSPLINOFF(i9xx_plane));

					       DSPLINOFF(dev_priv, i9xx_plane));

		base = intel_de_read(dev_priv, DSPSURF(i9xx_plane)) & DISP_ADDR_MASK;

	} else {

		offset = 0;

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
#define DSPADDR(dev_priv, plane)		_MMIO_PIPE2(dev_priv, plane, _DSPAADDR)



#define _DSPALINOFF				0x70184 /* i965+ */

#define DSPLINOFF(plane)			_MMIO_PIPE2(dev_priv, plane, _DSPALINOFF)

#define DSPLINOFF(dev_priv, plane)		_MMIO_PIPE2(dev_priv, plane, _DSPALINOFF)



#define _DSPASTRIDE				0x70188

#define DSPSTRIDE(plane)			_MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE)