Commit 278289bc authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'add-gmac-support-for-renesas-rz-t2h-n2h-socs' 

Lad Prabhakar says:

====================
Add GMAC support for Renesas RZ/{T2H, N2H} SoCs

This series adds support for the Ethernet MAC (GMAC) IP present on
the Renesas RZ/T2H and RZ/N2H SoCs.

While these SoCs use the same Synopsys DesignWare MAC IP (version 5.20) as
the existing RZ/V2H(P), the hardware is synthesized with different options
that require driver and binding updates:
- 8 RX/TX queue pairs instead of 4 (requiring 19 interrupts vs 11)
- Different clock requirements (3 clocks vs 7)
- Different reset handling (2 named resets vs 1 unnamed)
- Split header feature enabled
- GMAC connected through a MIIC PCS on RZ/T2H

The series first updates the generic dwmac binding to accommodate the
higher interrupt count, then extends the Renesas-specific binding with
a to document both SoCs.

The driver changes prepare for multi-SoC support by introducing OF match
data for per-SoC configuration, then add RZ/T2H support including PCS
integration through the existing RZN1 MIIC driver.

Note this patch series is dependent on the PCS driver [0]
(not a build dependency).
[0] https://lore.kernel.org/all/20250904114204.4148520-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
====================

Link: https://patch.msgid.link/20250908105901.3198975-1-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents fc006f54 57e9e4d7

Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml

+138 −40
Original line number Diff line number Diff line
@@ -17,25 +17,36 @@ select: 
          - renesas,r9a09g047-gbeth

          - renesas,r9a09g056-gbeth

          - renesas,r9a09g057-gbeth

          - renesas,r9a09g077-gbeth

          - renesas,r9a09g087-gbeth

          - renesas,rzv2h-gbeth

  required:

    - compatible



properties:

  compatible:

    items:

    oneOf:

      - items:

          - enum:

              - renesas,r9a09g047-gbeth # RZ/G3E

              - renesas,r9a09g056-gbeth # RZ/V2N

              - renesas,r9a09g057-gbeth # RZ/V2H(P)

          - const: renesas,rzv2h-gbeth

          - const: snps,dwmac-5.20

      - items:

          - const: renesas,r9a09g077-gbeth # RZ/T2H

          - const: snps,dwmac-5.20

      - items:

          - const: renesas,r9a09g087-gbeth # RZ/N2H

          - const: renesas,r9a09g077-gbeth

          - const: snps,dwmac-5.20



  reg:

    maxItems: 1



  clocks:

    items:

    oneOf:

      - items:

          - description: CSR clock

          - description: AXI system clock

          - description: PTP clock
@@ -43,9 +54,14 @@ properties: 
          - description: RX clock

          - description: TX clock phase-shifted by 180 degrees

          - description: RX clock phase-shifted by 180 degrees

      - items:

          - description: CSR clock

          - description: AXI system clock

          - description: TX clock



  clock-names:

    items:

    oneOf:

      - items:

          - const: stmmaceth

          - const: pclk

          - const: ptp_ref
@@ -53,12 +69,26 @@ properties: 
          - const: rx

          - const: tx-180

          - const: rx-180



  interrupts:

    minItems: 11

      - items:

          - const: stmmaceth

          - const: pclk

          - const: tx



  interrupt-names:

    items:

    oneOf:

      - items:

          - const: macirq

          - const: eth_wake_irq

          - const: eth_lpi

          - const: rx-queue-0

          - const: rx-queue-1

          - const: rx-queue-2

          - const: rx-queue-3

          - const: tx-queue-0

          - const: tx-queue-1

          - const: tx-queue-2

          - const: tx-queue-3

      - items:

          - const: macirq

          - const: eth_wake_irq

          - const: eth_lpi
@@ -66,14 +96,32 @@ properties: 
          - const: rx-queue-1

          - const: rx-queue-2

          - const: rx-queue-3

          - const: rx-queue-4

          - const: rx-queue-5

          - const: rx-queue-6

          - const: rx-queue-7

          - const: tx-queue-0

          - const: tx-queue-1

          - const: tx-queue-2

          - const: tx-queue-3

          - const: tx-queue-4

          - const: tx-queue-5

          - const: tx-queue-6

          - const: tx-queue-7



  resets:

    items:

    oneOf:

      - items:

          - description: AXI power-on system reset

      - items:

          - description: AXI power-on system reset

          - description: AHB reset



  pcs-handle:

    description:

      phandle pointing to a PCS sub-node compatible with

      Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml#

      (Refer RZ/T2H portion in the DT-binding file)



required:

  - compatible
@@ -87,6 +135,56 @@ required: 
allOf:

  - $ref: snps,dwmac.yaml#



  - if:

      properties:

        compatible:

          contains:

            const: renesas,r9a09g077-gbeth

    then:

      properties:

        clocks:

          maxItems: 3



        clock-names:

          maxItems: 3



        interrupts:

          minItems: 19



        interrupt-names:

          minItems: 19



        resets:

          minItems: 2



        reset-names:

          minItems: 2



      required:

        - reset-names

    else:

      properties:

        clocks:

          minItems: 7



        clock-names:

          minItems: 7



        interrupts:

          minItems: 11

          maxItems: 11



        interrupt-names:

          minItems: 11

          maxItems: 11



        resets:

          maxItems: 1



        pcs-handle: false



        reset-names: false



unevaluatedProperties: false



examples:

Documentation/devicetree/bindings/net/snps,dwmac.yaml

+5 −4
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ properties: 
        - qcom,sc8280xp-ethqos

        - qcom,sm8150-ethqos

        - renesas,r9a06g032-gmac

        - renesas,r9a09g077-gbeth

        - renesas,rzn1-gmac

        - renesas,rzv2h-gbeth

        - rockchip,px30-gmac
@@ -118,11 +119,11 @@ properties: 


  interrupts:

    minItems: 1

    maxItems: 11

    maxItems: 19



  interrupt-names:

    minItems: 1

    maxItems: 11

    maxItems: 19

    items:

      oneOf:

        - description: Combined signal for various interrupt events
@@ -134,9 +135,9 @@ properties: 
        - description: The interrupt that occurs when HW safety error triggered

          const: sfty

        - description: Per channel receive completion interrupt

          pattern: '^rx-queue-[0-3]$'

          pattern: '^rx-queue-[0-7]$'

        - description: Per channel transmit completion interrupt

          pattern: '^tx-queue-[0-3]$'

          pattern: '^tx-queue-[0-7]$'



  clocks:

    minItems: 1

drivers/net/ethernet/stmicro/stmmac/Kconfig

+7 −5
Original line number Diff line number Diff line
@@ -133,15 +133,17 @@ config DWMAC_QCOM_ETHQOS 
	  stmmac device driver.



config DWMAC_RENESAS_GBETH

	tristate "Renesas RZ/V2H(P) GBETH support"

	tristate "Renesas RZ/V2H(P) GBETH and RZ/T2H, RZ/N2H GMAC support"

	default ARCH_RENESAS

	depends on OF && (ARCH_RENESAS || COMPILE_TEST)

	select PCS_RZN1_MIIC

	help

	  Support for Gigabit Ethernet Interface (GBETH) on Renesas

	  RZ/V2H(P) SoCs.

	  Support for Gigabit Ethernet Interface (GBETH)/ Ethernet MAC (GMAC)

	  on Renesas SoCs.



	  This selects the Renesas RZ/V2H(P) Soc specific glue layer support

	  for the stmmac device driver.

	  This selects Renesas SoC glue layer support for the stmmac device

	  driver. This driver is used for the RZ/V2H(P) family, RZ/T2H and

	  RZ/N2H SoCs.



config DWMAC_ROCKCHIP

	tristate "Rockchip dwmac support"

drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c

+98 −10
Original line number Diff line number Diff line
@@ -16,12 +16,37 @@ 
#include <linux/clk.h>

#include <linux/device.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/pcs-rzn1-miic.h>

#include <linux/platform_device.h>

#include <linux/reset.h>

#include <linux/types.h>



#include "stmmac_platform.h"



/**

 * struct renesas_gbeth_of_data - OF data for Renesas GBETH

 *

 * @clks: Array of clock names

 * @num_clks: Number of clocks

 * @stmmac_flags: Flags for the stmmac driver

 * @handle_reset: Flag to indicate if reset control is

 *                handled by the glue driver or core driver.

 * @set_clk_tx_rate: Flag to indicate if Tx clock is fixed or

 *                   set_clk_tx_rate is needed.

 * @has_pcs: Flag to indicate if the MAC has a PCS

 */

struct renesas_gbeth_of_data {

	const char * const *clks;

	u8 num_clks;

	u32 stmmac_flags;

	bool handle_reset;

	bool set_clk_tx_rate;

	bool has_pcs;

};



struct renesas_gbeth {

	const struct renesas_gbeth_of_data *of_data;

	struct plat_stmmacenet_data *plat_dat;

	struct reset_control *rstc;

	struct device *dev;
@@ -31,6 +56,41 @@ static const char *const renesas_gbeth_clks[] = { 
	"tx", "tx-180", "rx", "rx-180",

};



static const char *const renesas_gmac_clks[] = {

	"tx",

};



static int renesas_gmac_pcs_init(struct stmmac_priv *priv)

{

	struct device_node *np = priv->device->of_node;

	struct device_node *pcs_node;

	struct phylink_pcs *pcs;



	pcs_node = of_parse_phandle(np, "pcs-handle", 0);

	if (pcs_node) {

		pcs = miic_create(priv->device, pcs_node);

		of_node_put(pcs_node);

		if (IS_ERR(pcs))

			return PTR_ERR(pcs);



		priv->hw->phylink_pcs = pcs;

	}



	return 0;

}



static void renesas_gmac_pcs_exit(struct stmmac_priv *priv)

{

	if (priv->hw->phylink_pcs)

		miic_destroy(priv->hw->phylink_pcs);

}



static struct phylink_pcs *renesas_gmac_select_pcs(struct stmmac_priv *priv,

						   phy_interface_t interface)

{

	return priv->hw->phylink_pcs;

}



static int renesas_gbeth_init(struct platform_device *pdev, void *priv)

{

	struct plat_stmmacenet_data *plat_dat;
@@ -70,6 +130,7 @@ static void renesas_gbeth_exit(struct platform_device *pdev, void *priv) 


static int renesas_gbeth_probe(struct platform_device *pdev)

{

	const struct renesas_gbeth_of_data *of_data;

	struct plat_stmmacenet_data *plat_dat;

	struct stmmac_resources stmmac_res;

	struct device *dev = &pdev->dev;
@@ -91,14 +152,17 @@ static int renesas_gbeth_probe(struct platform_device *pdev) 
	if (!gbeth)

		return -ENOMEM;



	plat_dat->num_clks = ARRAY_SIZE(renesas_gbeth_clks);

	of_data = of_device_get_match_data(&pdev->dev);

	gbeth->of_data = of_data;



	plat_dat->num_clks = of_data->num_clks;

	plat_dat->clks = devm_kcalloc(dev, plat_dat->num_clks,

				      sizeof(*plat_dat->clks), GFP_KERNEL);

	if (!plat_dat->clks)

		return -ENOMEM;



	for (i = 0; i < plat_dat->num_clks; i++)

		plat_dat->clks[i].id = renesas_gbeth_clks[i];

		plat_dat->clks[i].id = of_data->clks[i];



	err = devm_clk_bulk_get(dev, plat_dat->num_clks, plat_dat->clks);

	if (err < 0)
@@ -109,25 +173,49 @@ static int renesas_gbeth_probe(struct platform_device *pdev) 
		return dev_err_probe(dev, -EINVAL,

				     "error finding tx clock\n");



	if (of_data->handle_reset) {

		gbeth->rstc = devm_reset_control_get_exclusive(dev, NULL);

		if (IS_ERR(gbeth->rstc))

			return PTR_ERR(gbeth->rstc);

	}



	gbeth->dev = dev;

	gbeth->plat_dat = plat_dat;

	plat_dat->bsp_priv = gbeth;

	if (of_data->set_clk_tx_rate)

		plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;

	plat_dat->init = renesas_gbeth_init;

	plat_dat->exit = renesas_gbeth_exit;

	plat_dat->flags |= STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY |

			   STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP |

			   STMMAC_FLAG_SPH_DISABLE;

	plat_dat->flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP |

			   gbeth->of_data->stmmac_flags;

	if (of_data->has_pcs) {

		plat_dat->pcs_init = renesas_gmac_pcs_init;

		plat_dat->pcs_exit = renesas_gmac_pcs_exit;

		plat_dat->select_pcs = renesas_gmac_select_pcs;

	}



	return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);

}



static const struct renesas_gbeth_of_data renesas_gbeth_of_data = {

	.clks = renesas_gbeth_clks,

	.num_clks = ARRAY_SIZE(renesas_gbeth_clks),

	.handle_reset = true,

	.set_clk_tx_rate = true,

	.stmmac_flags = STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY |

			STMMAC_FLAG_SPH_DISABLE,

};



static const struct renesas_gbeth_of_data renesas_gmac_of_data = {

	.clks = renesas_gmac_clks,

	.num_clks = ARRAY_SIZE(renesas_gmac_clks),

	.stmmac_flags = STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY,

	.has_pcs = true,

};



static const struct of_device_id renesas_gbeth_match[] = {

	{ .compatible = "renesas,rzv2h-gbeth", },

	{ .compatible = "renesas,r9a09g077-gbeth", .data = &renesas_gmac_of_data },

	{ .compatible = "renesas,rzv2h-gbeth", .data = &renesas_gbeth_of_data },

	{ /* Sentinel */ }

};

MODULE_DEVICE_TABLE(of, renesas_gbeth_match);