Commit 287bfaf6 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Make utility pin asserts more accurate 

Only the PWM output mode of the utility pin is incompatible
with DC6/LCPLL disable. Check for that specifically.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/6609


Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230328164938.8193-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent ea1deabc

drivers/gpu/drm/i915/display/intel_display_power.c

+4 −2
Original line number Diff line number Diff line
@@ -1182,8 +1182,10 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) 
				"CPU PWM2 enabled\n");

	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,

			"PCH PWM1 enabled\n");

	I915_STATE_WARN(intel_de_read(dev_priv, UTIL_PIN_CTL) & UTIL_PIN_ENABLE,

			"Utility pin enabled\n");

	I915_STATE_WARN((intel_de_read(dev_priv, UTIL_PIN_CTL) &

			 (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==

			(UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),

			"Utility pin enabled in PWM mode\n");

	I915_STATE_WARN(intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,

			"PCH GTC enabled\n");

drivers/gpu/drm/i915/display/intel_display_power_well.c

+4 −2
Original line number Diff line number Diff line
@@ -818,8 +818,10 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) 
static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)

{

	drm_WARN_ONCE(&dev_priv->drm,

		      intel_de_read(dev_priv, UTIL_PIN_CTL) & UTIL_PIN_ENABLE,

		      "Backlight is not disabled.\n");

		      (intel_de_read(dev_priv, UTIL_PIN_CTL) &

		       (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==

		      (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),

		      "Utility pin enabled in PWM mode\n");

	drm_WARN_ONCE(&dev_priv->drm,

		      (intel_de_read(dev_priv, DC_STATE_EN) &

		       DC_STATE_EN_UPTO_DC6),