Commit 28daf9a3 authored by Marc Kleine-Budde's avatar Marc Kleine-Budde
Browse files

Merge patch series "add FlexCAN support for S32G2/S32G3 SoCs" 

Ciprian Costea <ciprianmarian.costea@oss.nxp.com> says:

S32G2 and S32G3 SoCs share the FlexCAN module with i.MX SoCs, with
some hardware integration particularities.

Main difference covered by this patch-set relates to interrupt
management. On S32G2/S32G3 SoC, there are separate interrupts for
state change, bus errors, MBs 0-7 and MBs 8-127 respectively.

Changes in V4:
- Updated IRQ description in bindings documentation
- Fixed some small issues with the proposed changes in the flexcan
  binding documentation

Changes in V3:
- Added Vincent Mailhol's Reviewed-by tag on the second patch
- Changed to 'platform_get_irq_byname' for second range of mailboxes
- Made several rephasing in bindings doc
- Removed Frank Li's Reviewed-by tags since changes were made
  afterwards.

Changes in V2:
- Separated 'FLEXCAN_QUIRK_NR_IRQ_3' quirk addition from S32G SoC
  Flexcan support.
- Provided more information in dt-bindings documentation with respect
  to FlexCAN module integration on S32G SoCs.
- Fixed and IRQ resource freeing management issue.

Link: https://patch.msgid.link/20250113120704.522307-1-ciprianmarian.costea@oss.nxp.com


Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parents ff98a2fd 8503a4b1

Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml

+40 −4
Original line number Diff line number Diff line
@@ -10,9 +10,6 @@ title: 
maintainers:

  - Marc Kleine-Budde <mkl@pengutronix.de>



allOf:

  - $ref: can-controller.yaml#



properties:

  compatible:

    oneOf:
@@ -28,6 +25,7 @@ properties: 
          - fsl,vf610-flexcan

          - fsl,ls1021ar2-flexcan

          - fsl,lx2160ar1-flexcan

          - nxp,s32g2-flexcan

      - items:

          - enum:

              - fsl,imx53-flexcan
@@ -43,12 +41,21 @@ properties: 
          - enum:

              - fsl,ls1028ar1-flexcan

          - const: fsl,lx2160ar1-flexcan

      - items:

          - enum:

              - nxp,s32g3-flexcan

          - const: nxp,s32g2-flexcan



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1

    minItems: 1

    maxItems: 4



  interrupt-names:

    minItems: 1

    maxItems: 4



  clocks:

    maxItems: 2
@@ -136,6 +143,35 @@ required: 
  - reg

  - interrupts



allOf:

  - $ref: can-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: nxp,s32g2-flexcan

    then:

      properties:

        interrupts:

          items:

            - description: Message Buffer interrupt for mailboxes 0-7 and Enhanced RX FIFO

            - description: Device state change

            - description: Bus Error detection

            - description: Message Buffer interrupt for mailboxes 8-127

        interrupt-names:

          items:

            - const: mb-0

            - const: state

            - const: berr

            - const: mb-1

      required:

        - interrupt-names

    else:

      properties:

        interrupts:

          maxItems: 1

        interrupt-names: false



additionalProperties: false



examples:

drivers/net/can/flexcan/flexcan-core.c

+34 −1
Original line number Diff line number Diff line
@@ -386,6 +386,16 @@ static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = { 
		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,

};



static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {

	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |

		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |

		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |

		FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_NR_IRQ_3 |

		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |

		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR |

		FLEXCAN_QUIRK_SECONDARY_MB_IRQ,

};



static const struct can_bittiming_const flexcan_bittiming_const = {

	.name = DRV_NAME,

	.tseg1_min = 4,
@@ -1762,13 +1772,24 @@ static int flexcan_open(struct net_device *dev) 
			goto out_free_irq_boff;

	}



	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {

		err = request_irq(priv->irq_secondary_mb,

				  flexcan_irq, IRQF_SHARED, dev->name, dev);

		if (err)

			goto out_free_irq_err;

	}



	flexcan_chip_interrupts_enable(dev);



	netif_start_queue(dev);



	return 0;



 out_free_irq_err:

	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)

		free_irq(priv->irq_err, dev);

 out_free_irq_boff:

	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)

		free_irq(priv->irq_boff, dev);

 out_free_irq:

	free_irq(dev->irq, dev);
@@ -1794,6 +1815,9 @@ static int flexcan_close(struct net_device *dev) 
	netif_stop_queue(dev);

	flexcan_chip_interrupts_disable(dev);



	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ)

		free_irq(priv->irq_secondary_mb, dev);



	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {

		free_irq(priv->irq_err, dev);

		free_irq(priv->irq_boff, dev);
@@ -2041,6 +2065,7 @@ static const struct of_device_id flexcan_of_match[] = { 
	{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },

	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },

	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },

	{ .compatible = "nxp,s32g2-flexcan", .data = &nxp_s32g2_devtype_data, },

	{ /* sentinel */ },

};

MODULE_DEVICE_TABLE(of, flexcan_of_match);
@@ -2187,6 +2212,14 @@ static int flexcan_probe(struct platform_device *pdev) 
		}

	}



	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {

		priv->irq_secondary_mb = platform_get_irq_byname(pdev, "mb-1");

		if (priv->irq_secondary_mb < 0) {

			err = priv->irq_secondary_mb;

			goto failed_platform_get_irq;

		}

	}



	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SUPPORT_FD) {

		priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD |

			CAN_CTRLMODE_FD_NON_ISO;

drivers/net/can/flexcan/flexcan.h

+5 −0
Original line number Diff line number Diff line
@@ -70,6 +70,10 @@ 
#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)

/* Setup stop mode with ATF SCMI protocol to support wakeup */

#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)

/* Device has two separate interrupt lines for two mailbox ranges, which

 * both need to have an interrupt handler registered.

 */

#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)



struct flexcan_devtype_data {

	u32 quirks;		/* quirks needed for different IP cores */
@@ -107,6 +111,7 @@ struct flexcan_priv { 


	int irq_boff;

	int irq_err;

	int irq_secondary_mb;



	/* IPC handle when setup stop mode by System Controller firmware(scfw) */

	struct imx_sc_ipc *sc_ipc_handle;