Commit 2978fdc2 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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Merge tag 'renesas-r9a08g045-dt-binding-defs-tag3' into renesas-clk-for-v6.13

Renesas RZ/G3S DT Binding Definitions

VBATTB clock definitions for the Renesas RZ/G3S (R9A08G045) SoC, shared
by driver and DT source files.
parents e1ef630c cdfd5daf
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas Battery Backup Function (VBATTB)

description:
  Renesas VBATTB is an always on powered module (backed by battery) which
  controls the RTC clock (VBATTCLK), tamper detection logic and a small
  general usage memory (128B).

maintainers:
  - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

properties:
  compatible:
    const: renesas,r9a08g045-vbattb

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: tamper detector interrupt

  clocks:
    items:
      - description: VBATTB module clock
      - description: RTC input clock (crystal or external clock device)

  clock-names:
    items:
      - const: bclk
      - const: rtx

  '#clock-cells':
    const: 1

  power-domains:
    maxItems: 1

  resets:
    items:
      - description: VBATTB module reset

  quartz-load-femtofarads:
    description: load capacitance of the on board crystal
    enum: [ 4000, 7000, 9000, 12500 ]
    default: 4000

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - '#clock-cells'
  - power-domains
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r9a08g045-cpg.h>
    #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    clock-controller@1005c000 {
        compatible = "renesas,r9a08g045-vbattb";
        reg = <0x1005c000 0x1000>;
        interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
        clock-names = "bclk", "rtx";
        assigned-clocks = <&vbattb VBATTB_MUX>;
        assigned-clock-parents = <&vbattb VBATTB_XC>;
        #clock-cells = <1>;
        power-domains = <&cpg>;
        resets = <&cpg R9A08G045_VBAT_BRESETN>;
        quartz-load-femtofarads = <12500>;
    };
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 *
 * Copyright (C) 2024 Renesas Electronics Corp.
 */
#ifndef __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__
#define __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__

#define VBATTB_XC		0
#define VBATTB_XBYP		1
#define VBATTB_MUX		2
#define VBATTB_VBATTCLK		3

#endif /* __DT_BINDINGS_CLOCK_R9A08G045_VBATTB_H__ */