Commit 29b4a699 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2024-08-02' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes from Dave Airlie:
 "Regular weekly fixes. This is a bit larger than usual but doesn't seem
  too crazy.

  Most of it is vmwgfx changes that fix a bunch of issues with wayland
  userspaces with dma-buf/external buffers and modesetting fixes.

  Otherwise it's kinda spread out, v3d fixes some new ioctls, nouveau
  has regression revert and fixes, amdgpu, i915 and ast have some small
  fixes, and some core fixes spread about.

  client:
   - fix error code

  atomic:
   - allow damage clips with async flips
   - allow explicit sync with async flips

  kselftests:
   - fix dmabuf-heaps test

  panic:
   - fix schedule_work in panic paths

  panel:
   - fix OrangePi Neo orientation

  gpuvm:
   - fix missing dependency

  amdgpu:
   - SMU 14.x update
   - Fix contiguous VRAM handling for IB parsing
   - GFX 12 fix
   - Regression fix for old APUs

  i915:
   - Static analysis fix for int overflow
   - Fix for HDCP2_STREAM_STATUS macro and removal of PWR_CLK_STATE for gen12

  nouveau:
   - revert busy wait change that caused a resume regression
   - fix buffer placement fault on dynamic pm s/r
   - fix refcount underflow

  ast:
   - fix black screen on resume
   - wake during connector status detect

  v3d:
   - fix issues with perf/timestamp ioctls

  vmwgfx:
   - fix deadlock in dma-buf fence polling
   - fix screen surface refcounting
   - fix dumb buffer handling
   - fix support for external buffers
   - fix overlay with screen targets
   - trigger modeset on screen moves"

* tag 'drm-fixes-2024-08-02' of https://gitlab.freedesktop.org/drm/kernel: (31 commits)
  Revert "nouveau: rip out busy fence waits"
  nouveau: set placement to original placement on uvmm validate.
  drm/atomic: Allow userspace to use damage clips with async flips
  drm/atomic: Allow userspace to use explicit sync with atomic async flips
  drm/i915: Fix possible int overflow in skl_ddi_calculate_wrpll()
  drm/i915/hdcp: Fix HDCP2_STREAM_STATUS macro
  drm/ast: astdp: Wake up during connector status detection
  i915/perf: Remove code to update PWR_CLK_STATE for gen12
  kselftests: dmabuf-heaps: Ensure the driver name is null-terminated
  drm/client: Fix error code in drm_client_buffer_vmap_local()
  drm/amdgpu: Fix APU handling in amdgpu_pm_load_smu_firmware()
  drm/amdgpu: increase mes log buffer size for gfx12
  drm/amdgpu: fix contiguous handling for IB parsing v2
  drm/amdgpu/pm: support gpu_metrics sysfs interface for smu v14.0.2/3
  drm/vmwgfx: Trigger a modeset when the screen moves
  drm/vmwgfx: Fix overlay when using Screen Targets
  drm/vmwgfx: Add basic support for external buffers
  drm/vmwgfx: Fix handling of dumb buffers
  drm/vmwgfx: Make sure the screen surface is ref counted
  drm/vmwgfx: Fix a deadlock in dma buf fence polling
  ...
parents 454e2370 27ce65f6

drivers/gpu/drm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -268,6 +268,7 @@ config DRM_EXEC 
config DRM_GPUVM

	tristate

	depends on DRM

	select DRM_EXEC

	help

	  GPU-VM representation providing helpers to manage a GPUs virtual

	  address space

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+8 −8
Original line number Diff line number Diff line
@@ -1778,7 +1778,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, 
	struct ttm_operation_ctx ctx = { false, false };

	struct amdgpu_vm *vm = &fpriv->vm;

	struct amdgpu_bo_va_mapping *mapping;

	int r;

	int i, r;



	addr /= AMDGPU_GPU_PAGE_SIZE;
@@ -1793,13 +1793,13 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, 
	if (dma_resv_locking_ctx((*bo)->tbo.base.resv) != &parser->exec.ticket)

		return -EINVAL;



	if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {

	(*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;

	amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains);

	for (i = 0; i < (*bo)->placement.num_placement; i++)

		(*bo)->placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS;

	r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);

	if (r)

		return r;

	}



	return amdgpu_ttm_alloc_gart(&(*bo)->tbo);

}

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

+3 −3
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) 
	if (!amdgpu_mes_log_enable)

		return 0;



	r = amdgpu_bo_create_kernel(adev, AMDGPU_MES_LOG_BUFFER_SIZE, PAGE_SIZE,

	r = amdgpu_bo_create_kernel(adev, adev->mes.event_log_size, PAGE_SIZE,

				    AMDGPU_GEM_DOMAIN_GTT,

				    &adev->mes.event_log_gpu_obj,

				    &adev->mes.event_log_gpu_addr,
@@ -113,7 +113,7 @@ static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) 
		return r;

	}



	memset(adev->mes.event_log_cpu_addr, 0, PAGE_SIZE);

	memset(adev->mes.event_log_cpu_addr, 0, adev->mes.event_log_size);



	return  0;
@@ -1573,7 +1573,7 @@ static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused) 
	uint32_t *mem = (uint32_t *)(adev->mes.event_log_cpu_addr);



	seq_hex_dump(m, "", DUMP_PREFIX_OFFSET, 32, 4,

		     mem, AMDGPU_MES_LOG_BUFFER_SIZE, false);

		     mem, adev->mes.event_log_size, false);



	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

+3 −3
Original line number Diff line number Diff line
@@ -52,7 +52,6 @@ enum amdgpu_mes_priority_level { 


#define AMDGPU_MES_PROC_CTX_SIZE 0x1000 /* one page area */

#define AMDGPU_MES_GANG_CTX_SIZE 0x1000 /* one page area */

#define AMDGPU_MES_LOG_BUFFER_SIZE 0x4000 /* Maximu log buffer size for MES */



struct amdgpu_mes_funcs;
@@ -135,6 +134,7 @@ struct amdgpu_mes { 
	unsigned long			*doorbell_bitmap;



	/* MES event log buffer */

	uint32_t			event_log_size;

	struct amdgpu_bo	*event_log_gpu_obj;

	uint64_t			event_log_gpu_addr;

	void				*event_log_cpu_addr;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

+2 −0
Original line number Diff line number Diff line
@@ -1163,6 +1163,8 @@ static int mes_v11_0_sw_init(void *handle) 
	adev->mes.kiq_hw_init = &mes_v11_0_kiq_hw_init;

	adev->mes.kiq_hw_fini = &mes_v11_0_kiq_hw_fini;



	adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;



	r = amdgpu_mes_init(adev);

	if (r)

		return r;