Commit 2b351e3d authored by Fangyu Yu's avatar Fangyu Yu Committed by Anup Patel
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RISC-V: KVM: Write hgatp register with valid mode bits 



According to the RISC-V Privileged Architecture Spec, when MODE=Bare
is selected,software must write zero to the remaining fields of hgatp.

We have detected the valid mode supported by the HW before, So using a
valid mode to detect how many vmid bits are supported.

Fixes: fd7bb4a2 ("RISC-V: KVM: Implement VMID allocator")
Reviewed-by: default avatarNutty Liu <nutty.liu@hotmail.com>
Reviewed-by: default avatarTroy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: default avatarGuo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Signed-off-by: default avatarFangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: default avatarGuo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250821142542.2472079-2-guoren@kernel.org


Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent dbe3d1d1

arch/riscv/kvm/vmid.c

+2 −1
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/smp.h>

#include <linux/kvm_host.h>

#include <asm/csr.h>

#include <asm/kvm_mmu.h>

#include <asm/kvm_tlb.h>

#include <asm/kvm_vmid.h>
@@ -28,7 +29,7 @@ void __init kvm_riscv_gstage_vmid_detect(void) 


	/* Figure-out number of VMID bits in HW */

	old = csr_read(CSR_HGATP);

	csr_write(CSR_HGATP, old | HGATP_VMID);

	csr_write(CSR_HGATP, (kvm_riscv_gstage_mode << HGATP_MODE_SHIFT) | HGATP_VMID);

	vmid_bits = csr_read(CSR_HGATP);

	vmid_bits = (vmid_bits & HGATP_VMID) >> HGATP_VMID_SHIFT;

	vmid_bits = fls_long(vmid_bits);