Commit 2bd5059c authored by Joerg Roedel's avatar Joerg Roedel
Browse files

Merge branches 'arm/renesas', 'arm/smmu', 'x86/amd', 'core' and 'x86/vt-d' into next

parents a38297e3 209516ca da55da5a de111f6b 8b80549f ba00196c

Documentation/admin-guide/cgroup-v2.rst

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@@ -1432,7 +1432,7 @@ PAGE_SIZE multiple when read back. 
	  sec_pagetables

		Amount of memory allocated for secondary page tables,

		this currently includes KVM mmu allocations on x86

		and arm64.

		and arm64 and IOMMU page tables.



	  percpu (npn)

		Amount of memory used for storing per-cpu kernel

Documentation/devicetree/bindings/iommu/qcom,tbu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/iommu/qcom,tbu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm TBU (Translation Buffer Unit)



maintainers:

  - Georgi Djakov <quic_c_gdjako@quicinc.com>



description:

  The Qualcomm SMMU500 implementation consists of TCU and TBU. The TBU contains

  a Translation Lookaside Buffer (TLB) that caches page tables. TBUs provides

  debug features to trace and trigger debug transactions. There are multiple TBU

  instances with each client core.



properties:

  compatible:

    enum:

      - qcom,sc7280-tbu

      - qcom,sdm845-tbu



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  interconnects:

    maxItems: 1



  power-domains:

    maxItems: 1



  qcom,stream-id-range:

    description: |

      Phandle of a SMMU device and Stream ID range (address and size) that

      is assigned by the TBU

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      - items:

          - description: phandle of a smmu node

          - description: stream id base address

          - description: stream id size



required:

  - compatible

  - reg

  - qcom,stream-id-range



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-sdm845.h>

    #include <dt-bindings/interconnect/qcom,icc.h>

    #include <dt-bindings/interconnect/qcom,sdm845.h>



    tbu@150e1000 {

        compatible = "qcom,sdm845-tbu";

        reg = <0x150e1000 0x1000>;

        clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;

        interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY

                         &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;

        power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>;

        qcom,stream-id-range = <&apps_smmu 0x1c00 0x400>;

    };

...

Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml

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@@ -50,6 +50,7 @@ properties: 
              - renesas,ipmmu-r8a779a0           # R-Car V3U

              - renesas,ipmmu-r8a779f0           # R-Car S4-8

              - renesas,ipmmu-r8a779g0           # R-Car V4H

              - renesas,ipmmu-r8a779h0           # R-Car V4M

          - const: renesas,rcar-gen4-ipmmu-vmsa  # R-Car Gen4



  reg:

Documentation/filesystems/proc.rst

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@@ -1110,8 +1110,8 @@ KernelStack 
PageTables

              Memory consumed by userspace page tables

SecPageTables

              Memory consumed by secondary page tables, this currently

              currently includes KVM mmu allocations on x86 and arm64.

              Memory consumed by secondary page tables, this currently includes

              KVM mmu and IOMMU allocations on x86 and arm64.

NFS_Unstable

              Always zero. Previous counted pages which had been written to

              the server, but has not been committed to stable storage.

arch/arc/mm/dma.c

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@@ -90,8 +90,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, 
/*

 * Plug in direct dma map ops.

 */

void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,

			bool coherent)

void arch_setup_dma_ops(struct device *dev, bool coherent)

{

	/*

	 * IOC hardware snoops all DMA traffic keeping the caches consistent