Commit 2e60560f authored by Karol Kolacinski's avatar Karol Kolacinski Committed by Tony Nguyen
Browse files

ice: Fix ETH56G FC-FEC Rx offset value 



Fix ETH56G FC-FEC incorrect Rx offset value by changing it from -255.96
to -469.26 ns.

Those values are derived from HW spec and reflect internal delays.
Hex value is a fixed point representation in Q23.9 format.

Fixes: 7cab44f1 ("ice: Introduce ETH56G PHY model for E825C products")
Reviewed-by: default avatarArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent dc26548d

drivers/net/ethernet/intel/ice/ice_ptp_consts.h

+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ struct ice_eth56g_mac_reg_cfg eth56g_mac_cfg[NUM_ICE_ETH56G_LNK_SPD] = { 
		.rx_offset = {

			.serdes = 0xffffeb27, /* -10.42424 */

			.no_fec = 0xffffcccd, /* -25.6 */

			.fc = 0xfffe0014, /* -255.96 */

			.fc = 0xfffc557b, /* -469.26 */

			.sfd = 0x4a4, /* 2.32 */

			.bs_ds = 0x32 /* 0.0969697 */

		}