Commit 2fff0b5e authored by Mario Limonciello's avatar Mario Limonciello Committed by Linus Walleij
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pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend



If a pin isn't marked as a wake source processing any interrupts is
just going to destroy battery life.  The APU may wake up from a hardware
sleep state to process the interrupt but not return control to the OS.

Mask interrupt for all non-wake source pins at suspend. They'll be
re-enabled at resume.

Reported-and-tested-by: default avatarMarcus Aram <marcus+oss@oxar.nl>
Reported-and-tested-by: default avatarMark Herbert <mark.herbert42@gmail.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2812


Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20231203032431.30277-3-mario.limonciello@amd.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 5c584f17
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+9 −0
Original line number Diff line number Diff line
@@ -923,6 +923,15 @@ static int amd_gpio_suspend(struct device *dev)

		raw_spin_lock_irqsave(&gpio_dev->lock, flags);
		gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin * 4) & ~PIN_IRQ_PENDING;

		/* mask any interrupts not intended to be a wake source */
		if (!(gpio_dev->saved_regs[i] & WAKE_SOURCE)) {
			writel(gpio_dev->saved_regs[i] & ~BIT(INTERRUPT_MASK_OFF),
			       gpio_dev->base + pin * 4);
			pm_pr_dbg("Disabling GPIO #%d interrupt for suspend.\n",
				  pin);
		}

		raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
	}

+5 −0
Original line number Diff line number Diff line
@@ -80,6 +80,11 @@
#define FUNCTION_MASK		GENMASK(1, 0)
#define FUNCTION_INVALID	GENMASK(7, 0)

#define WAKE_SOURCE	(BIT(WAKE_CNTRL_OFF_S0I3) | \
			 BIT(WAKE_CNTRL_OFF_S3)   | \
			 BIT(WAKE_CNTRL_OFF_S4)   | \
			 BIT(WAKECNTRL_Z_OFF))

struct amd_function {
	const char *name;
	const char * const groups[NSELECTS];