Commit 30194002 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi updates from Mark Brown:
 "A moderately busy release for SPI, the main core update was the
  merging of support for multiple chip selects, used in some flash
  configurations. There were also big overhauls for the AXI SPI Engine
  and PL022 drivers, plus some new device support for ST.

  There's a few patches for other trees, API updates to allow the
  multiple chip select support and one of the naming modernisations
  touched a controller embedded in the USB code.

   - Support for multiple chip selects.

   - A big overhaul for the AXI SPI engine driver, modernising it and
     adding a bunch of new features.

   - Modernisation of the PL022 driver, fixing some issues with
     submitting messages while in atomic context in the process.

   - Many drivers were converted to use new APIs which avoid outdated
     terminology for devices and controllers.

   - Support for ST Microelectronics STM32F7 and STM32MP25, and Renesas
     RZ/Five"

* tag 'spi-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (83 commits)
  spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc
  dt-bindings: spi: stm32: add st,stm32mp25-spi compatible
  spi: stm32: use dma_get_slave_caps prior to configuring dma channel
  spi: axi-spi-engine: fix struct member doc warnings
  spi: pl022: update description of internal_cs_control()
  spi: pl022: delete description of cur_msg
  spi: dw: Remove Intel Thunder Bay SOC support
  spi: dw: Remove Intel Thunder Bay SOC support
  spi: sh-msiof: Enforce fixed DTDL for R-Car H3
  spi: ljca: switch to use devm_spi_alloc_host()
  spi: cs42l43: switch to use devm_spi_alloc_host()
  spi: zynqmp-gqspi: switch to use modern name
  spi: zynq-qspi: switch to use modern name
  spi: xtensa-xtfpga: switch to use modern name
  spi: xlp: switch to use modern name
  spi: xilinx: switch to use modern name
  spi: xcomm: switch to use modern name
  spi: uniphier: switch to use modern name
  spi: topcliff-pch: switch to use modern name
  spi: wpcm-fiu: switch to use devm_spi_alloc_host()
  ...
parents da968017 f6cd6623

Documentation/devicetree/bindings/spi/adi,axi-spi-engine.txt

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Analog Devices AXI SPI Engine controller Device Tree Bindings



Required properties:

- compatible		: Must be "adi,axi-spi-engine-1.00.a""

- reg			: Physical base address and size of the register map.

- interrupts		: Property with a value describing the interrupt

			  number.

- clock-names		: List of input clock names - "s_axi_aclk", "spi_clk"

- clocks		: Clock phandles and specifiers (See clock bindings for

			  details on clock-names and clocks).

- #address-cells	: Must be <1>

- #size-cells		: Must be <0>



Optional subnodes:

	Subnodes are use to represent the SPI slave devices connected to the SPI

	master. They follow the generic SPI bindings as outlined in spi-bus.txt.



Example:



    spi@@44a00000 {

		compatible = "adi,axi-spi-engine-1.00.a";

		reg = <0x44a00000 0x1000>;

		interrupts = <0 56 4>;

		clocks = <&clkc 15 &clkc 15>;

		clock-names = "s_axi_aclk", "spi_clk";



		#address-cells = <1>;

		#size-cells = <0>;



		/* SPI devices */

    };

Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/adi,axi-spi-engine.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Analog Devices AXI SPI Engine Controller



description: |

  The AXI SPI Engine controller is part of the SPI Engine framework[1] and

  allows memory mapped access to the SPI Engine control bus. This allows it

  to be used as a general purpose software driven SPI controller as well as

  some optional advanced acceleration and offloading capabilities.



  [1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine



maintainers:

  - Michael Hennerich <Michael.Hennerich@analog.com>

  - Nuno Sá <nuno.sa@analog.com>



allOf:

  - $ref: /schemas/spi/spi-controller.yaml#



properties:

  compatible:

    const: adi,axi-spi-engine-1.00.a



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: The AXI interconnect clock.

      - description: The SPI controller clock.



  clock-names:

    items:

      - const: s_axi_aclk

      - const: spi_clk



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    spi@44a00000 {

        compatible = "adi,axi-spi-engine-1.00.a";

        reg = <0x44a00000 0x1000>;

        interrupts = <0 56 4>;

        clocks = <&clkc 15>, <&clkc 15>;

        clock-names = "s_axi_aclk", "spi_clk";



        #address-cells = <1>;

        #size-cells = <0>;



        /* SPI devices */

    };

Documentation/devicetree/bindings/spi/renesas,rspi.yaml

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@@ -21,7 +21,7 @@ properties: 
          - enum:

              - renesas,rspi-r7s72100  # RZ/A1H

              - renesas,rspi-r7s9210   # RZ/A2

              - renesas,r9a07g043-rspi # RZ/G2UL

              - renesas,r9a07g043-rspi # RZ/G2UL and RZ/Five

              - renesas,r9a07g044-rspi # RZ/G2{L,LC}

              - renesas,r9a07g054-rspi # RZ/V2L

          - const: renesas,rspi-rz

Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml

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@@ -72,8 +72,6 @@ properties: 
          - const: snps,dw-apb-ssi

      - description: Intel Keem Bay SPI Controller

        const: intel,keembay-ssi

      - description: Intel Thunder Bay SPI Controller

        const: intel,thunderbay-ssi

      - description: Intel Mount Evans Integrated Management Complex SPI Controller

        const: intel,mountevans-imc-ssi

      - description: AMD Pensando Elba SoC SPI Controller

Documentation/devicetree/bindings/spi/st,stm32-spi.yaml

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@@ -23,7 +23,9 @@ properties: 
  compatible:

    enum:

      - st,stm32f4-spi

      - st,stm32f7-spi

      - st,stm32h7-spi

      - st,stm32mp25-spi



  reg:

    maxItems: 1