Commit 31a5b6ed authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/display: Unify VSC SPD preparation 



There is no specific reason to prepare VSC SDP for PSR case somehow
differently. Unify PSR and non-PSR preparation.

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: default avatarShawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-4-jouni.hogander@intel.com
parent 00076671

drivers/gpu/drm/i915/display/intel_dp.c

+6 −37
Original line number Diff line number Diff line
@@ -2616,28 +2616,17 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, 
				     struct intel_crtc_state *crtc_state,

				     const struct drm_connector_state *conn_state)

{

	struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc;

	struct drm_dp_vsc_sdp *vsc;



	/* When a crtc state has PSR, VSC SDP will be handled by PSR routine */

	if (crtc_state->has_psr)

	if ((!intel_dp->colorimetry_support ||

	     !intel_dp_needs_vsc_sdp(crtc_state, conn_state)) &&

	    !crtc_state->has_psr)

		return;



	if (!intel_dp->colorimetry_support ||

	    !intel_dp_needs_vsc_sdp(crtc_state, conn_state))

		return;

	vsc = &crtc_state->infoframes.vsc;



	crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);

	vsc->sdp_type = DP_SDP_VSC;

	intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,

					 &crtc_state->infoframes.vsc);

}



void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,

				  const struct intel_crtc_state *crtc_state,

				  const struct drm_connector_state *conn_state,

				  struct drm_dp_vsc_sdp *vsc)

{

	vsc->sdp_type = DP_SDP_VSC;



	if (crtc_state->has_psr2) {

		if (intel_dp->colorimetry_support &&
@@ -4289,24 +4278,6 @@ static void intel_write_dp_sdp(struct intel_encoder *encoder, 
	dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len);

}



void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,

			    const struct intel_crtc_state *crtc_state,

			    const struct drm_dp_vsc_sdp *vsc)

{

	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct dp_sdp sdp = {};

	ssize_t len;



	len = intel_dp_vsc_sdp_pack(vsc, &sdp, sizeof(sdp));



	if (drm_WARN_ON(&dev_priv->drm, len < 0))

		return;



	dig_port->write_infoframe(encoder, crtc_state, DP_SDP_VSC,

					&sdp, len);

}



void intel_dp_set_infoframes(struct intel_encoder *encoder,

			     bool enable,

			     const struct intel_crtc_state *crtc_state,
@@ -4333,8 +4304,6 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, 
	if (!enable)

		return;



	/* When PSR is enabled, VSC SDP is handled by PSR routine */

	if (!crtc_state->has_psr)

	intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);



	intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA);

drivers/gpu/drm/i915/display/intel_dp.h

+0 −7
Original line number Diff line number Diff line
@@ -109,13 +109,6 @@ int intel_dp_max_data_rate(int max_link_rate, int max_lanes); 
bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);

bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,

			    const struct drm_connector_state *conn_state);

void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,

				  const struct intel_crtc_state *crtc_state,

				  const struct drm_connector_state *conn_state,

				  struct drm_dp_vsc_sdp *vsc);

void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,

			    const struct intel_crtc_state *crtc_state,

			    const struct drm_dp_vsc_sdp *vsc);

void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,

			     const struct intel_crtc_state *crtc_state,

			     const struct drm_connector_state *conn_state);

drivers/gpu/drm/i915/display/intel_psr.c

+0 −6
Original line number Diff line number Diff line
@@ -1374,10 +1374,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, 
		return;



	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);



	crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);

	intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state,

				     &crtc_state->infoframes.vsc);

}



void intel_psr_get_config(struct intel_encoder *encoder,
@@ -1621,7 +1617,6 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, 
	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);

	struct intel_encoder *encoder = &dig_port->base;

	u32 val;



	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
@@ -1649,7 +1644,6 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, 
		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",

			    intel_dp->psr.psr2_enabled ? "2" : "1");



	intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->infoframes.vsc);

	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);

	intel_psr_enable_sink(intel_dp);

	intel_psr_enable_source(intel_dp, crtc_state);