Commit 31b15331 authored by Perry Yuan's avatar Perry Yuan Committed by Alex Deucher
Browse files

drm/amdgpu: ensure no_hw_access is visible before MMIO 



Add a full memory barrier after clearing no_hw_access in
amdgpu_device_mode1_reset() so subsequent PCI state restore
access cannot observe stale state on other CPUs.

Fixes: 7edb503f ("drm/amd/pm: Disable MMIO access during SMU Mode 1 reset")
Signed-off-by: default avatarPerry Yuan <perry.yuan@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3cc9398a

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+3 −0
Original line number Diff line number Diff line
@@ -5733,6 +5733,9 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev) 
	/* enable mmio access after mode 1 reset completed */

	adev->no_hw_access = false;



	/* ensure no_hw_access is updated before we access hw */

	smp_mb();



	amdgpu_device_load_pci_state(adev->pdev);

	ret = amdgpu_psp_wait_for_bootloader(adev);

	if (ret)