Commit 325b9a3e authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/controller/microchip'

- Move PLDA XpressRICH generic DT binding properties to
  plda,xpressrich3-axi-common.yaml where they can be shared across
  PLDA-based drivers (Minda Chen)

- Create a drivers/pci/controller/plda/ directory for PLDA-based drivers
  and move pcie-microchip-host.c there (Minda Chen)

- Move PLDA generic macros to pcie-plda.h where they can be shared across
  drivers (Minda Chen)

- Extract PLDA generic structures from pcie-microchip-host.c, rename them
  to be generic, and move them to pcie-plda-host.c where they can be shared
  across drivers (Minda Chen)

- Add a .request_event_irq() callback for requesting device-specific
  interrupts in addition to PLDA-generic interrupts (Minda Chen)

- Add DT binding and driver for the StarFive JH7110 SoC, based on PLDA IP
  (Minda Chen)

* pci/controller/microchip:
  PCI: starfive: Add JH7110 PCIe controller
  dt-bindings: PCI: Add StarFive JH7110 PCIe controller
  PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value
  PCI: plda: Pass pci_host_bridge to plda_pcie_setup_iomems()
  PCI: plda: Add host init/deinit and map bus functions
  PCI: plda: Add event bitmap field to struct plda_pcie_rp
  PCI: microchip: Move IRQ functions to pcie-plda-host.c
  PCI: microchip: Add event irqchip field to host port and add PLDA irqchip
  PCI: microchip: Add get_events() callback and PLDA get_event()
  PCI: microchip: Add INTx and MSI event num to struct plda_event
  PCI: microchip: Add request_event_irq() callback function
  PCI: microchip: Add num_events field to struct plda_pcie_rp
  PCI: microchip: Rename interrupt related functions
  PCI: microchip: Move PLDA functions to pcie-plda-host.c
  PCI: microchip: Rename PLDA functions to be generic
  PCI: microchip: Move PLDA structures to plda-pcie.h
  PCI: microchip: Rename PLDA structures to be generic
  PCI: microchip: Add bridge_addr field to struct mc_pcie
  PCI: microchip: Move PLDA IP register macros to pcie-plda.h
  PCI: microchip: Move pcie-microchip-host.c to PLDA directory
  dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties

# Conflicts:
#	drivers/pci/pci.h
parents 145eec91 39b91eb4
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+1 −54
Original line number Diff line number Diff line
@@ -10,21 +10,13 @@ maintainers:
  - Daire McNamara <daire.mcnamara@microchip.com>

allOf:
  - $ref: /schemas/pci/pci-host-bridge.yaml#
  - $ref: plda,xpressrich3-axi-common.yaml#
  - $ref: /schemas/interrupt-controller/msi-controller.yaml#

properties:
  compatible:
    const: microchip,pcie-host-1.0 # PolarFire

  reg:
    maxItems: 2

  reg-names:
    items:
      - const: cfg
      - const: apb

  clocks:
    description:
      Fabric Interface Controllers, FICs, are the interface between the FPGA
@@ -52,18 +44,6 @@ properties:
    items:
      pattern: '^fic[0-3]$'

  interrupts:
    minItems: 1
    items:
      - description: PCIe host controller
      - description: builtin MSI controller

  interrupt-names:
    minItems: 1
    items:
      - const: pcie
      - const: msi

  ranges:
    minItems: 1
    maxItems: 3
@@ -72,39 +52,6 @@ properties:
    minItems: 1
    maxItems: 6

  msi-controller:
    description: Identifies the node as an MSI controller.

  msi-parent:
    description: MSI controller the device is capable of using.

  interrupt-controller:
    type: object
    properties:
      '#address-cells':
        const: 0

      '#interrupt-cells':
        const: 1

      interrupt-controller: true

    required:
      - '#address-cells'
      - '#interrupt-cells'
      - interrupt-controller

    additionalProperties: false

required:
  - reg
  - reg-names
  - "#interrupt-cells"
  - interrupts
  - interrupt-map-mask
  - interrupt-map
  - msi-controller

unevaluatedProperties: false

examples:
+75 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/plda,xpressrich3-axi-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: PLDA XpressRICH PCIe host common properties

maintainers:
  - Daire McNamara <daire.mcnamara@microchip.com>
  - Kevin Xie <kevin.xie@starfivetech.com>

description:
  Generic PLDA XpressRICH PCIe host common properties.

allOf:
  - $ref: /schemas/pci/pci-host-bridge.yaml#

properties:
  reg:
    maxItems: 2

  reg-names:
    items:
      - const: cfg
      - const: apb

  interrupts:
    minItems: 1
    items:
      - description: PCIe host controller
      - description: builtin MSI controller

  interrupt-names:
    minItems: 1
    items:
      - const: pcie
      - const: msi

  msi-controller:
    description: Identifies the node as an MSI controller.

  msi-parent:
    description: MSI controller the device is capable of using.

  interrupt-controller:
    type: object
    properties:
      '#address-cells':
        const: 0

      '#interrupt-cells':
        const: 1

      interrupt-controller: true

    required:
      - '#address-cells'
      - '#interrupt-cells'
      - interrupt-controller

    additionalProperties: false

required:
  - reg
  - reg-names
  - interrupts
  - msi-controller
  - "#interrupt-cells"
  - interrupt-map-mask
  - interrupt-map

additionalProperties: true

...
+120 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/starfive,jh7110-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JH7110 PCIe host controller

maintainers:
  - Kevin Xie <kevin.xie@starfivetech.com>

allOf:
  - $ref: plda,xpressrich3-axi-common.yaml#

properties:
  compatible:
    const: starfive,jh7110-pcie

  clocks:
    items:
      - description: NOC bus clock
      - description: Transport layer clock
      - description: AXI MST0 clock
      - description: APB clock

  clock-names:
    items:
      - const: noc
      - const: tl
      - const: axi_mst0
      - const: apb

  resets:
    items:
      - description: AXI MST0 reset
      - description: AXI SLAVE0 reset
      - description: AXI SLAVE reset
      - description: PCIE BRIDGE reset
      - description: PCIE CORE reset
      - description: PCIE APB reset

  reset-names:
    items:
      - const: mst0
      - const: slv0
      - const: slv
      - const: brg
      - const: core
      - const: apb

  starfive,stg-syscon:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    description:
      The phandle to System Register Controller syscon node.

  perst-gpios:
    description: GPIO controlled connection to PERST# signal
    maxItems: 1

  phys:
    description:
      Specified PHY is attached to PCIe controller.
    maxItems: 1

required:
  - clocks
  - resets
  - starfive,stg-syscon

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        pcie@940000000 {
            compatible = "starfive,jh7110-pcie";
            reg = <0x9 0x40000000 0x0 0x10000000>,
                  <0x0 0x2b000000 0x0 0x1000000>;
            reg-names = "cfg", "apb";
            #address-cells = <3>;
            #size-cells = <2>;
            #interrupt-cells = <1>;
            device_type = "pci";
            ranges = <0x82000000  0x0 0x30000000  0x0 0x30000000 0x0 0x08000000>,
                     <0xc3000000  0x9 0x00000000  0x9 0x00000000 0x0 0x40000000>;
            starfive,stg-syscon = <&stg_syscon>;
            bus-range = <0x0 0xff>;
            interrupt-parent = <&plic>;
            interrupts = <56>;
            interrupt-map-mask = <0x0 0x0 0x0 0x7>;
            interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc0 0x1>,
                            <0x0 0x0 0x0 0x2 &pcie_intc0 0x2>,
                            <0x0 0x0 0x0 0x3 &pcie_intc0 0x3>,
                            <0x0 0x0 0x0 0x4 &pcie_intc0 0x4>;
            msi-controller;
            clocks = <&syscrg 86>,
                     <&stgcrg 10>,
                     <&stgcrg 8>,
                     <&stgcrg 9>;
            clock-names = "noc", "tl", "axi_mst0", "apb";
            resets = <&stgcrg 11>,
                     <&stgcrg 12>,
                     <&stgcrg 13>,
                     <&stgcrg 14>,
                     <&stgcrg 15>,
                     <&stgcrg 16>;
            perst-gpios = <&gpios 26 GPIO_ACTIVE_LOW>;
            phys = <&pciephy0>;

            pcie_intc0: interrupt-controller {
                #address-cells = <0>;
                #interrupt-cells = <1>;
                interrupt-controller;
            };
        };
    };
+17 −2
Original line number Diff line number Diff line
@@ -17219,6 +17219,14 @@ S: Maintained
F:	Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt
F:	drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
PCI DRIVER FOR PLDA PCIE IP
M:	Daire McNamara <daire.mcnamara@microchip.com>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml
F:	drivers/pci/controller/plda/pcie-plda-host.c
F:	drivers/pci/controller/plda/pcie-plda.h
PCI DRIVER FOR RENESAS R-CAR
M:	Marek Vasut <marek.vasut+renesas@gmail.com>
M:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
@@ -17449,7 +17457,7 @@ M: Daire McNamara <daire.mcnamara@microchip.com>
L:	linux-pci@vger.kernel.org
S:	Supported
F:	Documentation/devicetree/bindings/pci/microchip*
F:	drivers/pci/controller/*microchip*
F:	drivers/pci/controller/plda/*microchip*
PCIE DRIVER FOR QUALCOMM MSM
M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -17479,6 +17487,13 @@ L: linux-pci@vger.kernel.org
S:	Maintained
F:	drivers/pci/controller/dwc/*spear*
PCIE DRIVER FOR STARFIVE JH71x0
M:	Kevin Xie <kevin.xie@starfivetech.com>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
F:	drivers/pci/controller/plda/pcie-starfive.c
PCIE ENDPOINT DRIVER FOR QUALCOMM
M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L:	linux-pci@vger.kernel.org
@@ -19285,7 +19300,7 @@ F: drivers/clk/microchip/clk-mpfs*.c
F:	drivers/firmware/microchip/mpfs-auto-update.c
F:	drivers/i2c/busses/i2c-microchip-corei2c.c
F:	drivers/mailbox/mailbox-mpfs.c
F:	drivers/pci/controller/pcie-microchip-host.c
F:	drivers/pci/controller/plda/pcie-microchip-host.c
F:	drivers/pwm/pwm-microchip-core.c
F:	drivers/reset/reset-mpfs.c
F:	drivers/rtc/rtc-mpfs.c
+1 −8
Original line number Diff line number Diff line
@@ -215,14 +215,6 @@ config PCIE_MT7621
	help
	  This selects a driver for the MediaTek MT7621 PCIe Controller.

config PCIE_MICROCHIP_HOST
	tristate "Microchip AXI PCIe controller"
	depends on PCI_MSI && OF
	select PCI_HOST_COMMON
	help
	  Say Y here if you want kernel to support the Microchip AXI PCIe
	  Host Bridge driver.

config PCI_HYPERV_INTERFACE
	tristate "Microsoft Hyper-V PCI Interface"
	depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI
@@ -356,4 +348,5 @@ config PCIE_XILINX_CPM
source "drivers/pci/controller/cadence/Kconfig"
source "drivers/pci/controller/dwc/Kconfig"
source "drivers/pci/controller/mobiveil/Kconfig"
source "drivers/pci/controller/plda/Kconfig"
endmenu
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