Commit 34734ab7 authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/dg2: Add Wa_16011777198 



Coarse power gating for render should not be enabled on some DG2
steppings.

Bspec: 52698
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarClint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211116174818.2128062-4-matthew.d.roper@intel.com
parent 96b1c450

drivers/gpu/drm/i915/gt/intel_rc6.c

+11 −4
Original line number Diff line number Diff line
@@ -117,6 +117,13 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6) 
			GEN6_RC_CTL_RC6_ENABLE |

			GEN6_RC_CTL_EI_MODE(1);



	/* Wa_16011777198 - Render powergating must remain disabled */

	if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||

	    IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))

		pg_enable =

			GEN9_MEDIA_PG_ENABLE |

			GEN11_MEDIA_SAMPLER_PG_ENABLE;

	else

		pg_enable =

			GEN9_RENDER_PG_ENABLE |

			GEN9_MEDIA_PG_ENABLE |