Unverified Commit 34e9b16b authored by Cyan Yang's avatar Cyan Yang Committed by Palmer Dabbelt
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riscv: Add SiFive xsfvfwmaccqqq vendor extension 



Add SiFive vendor extension "xsfvfwmaccqqq" support to the kernel.

Signed-off-by: default avatarCyan Yang <cyan.yang@sifive.com>
Link: https://lore.kernel.org/r/20250418053239.4351-11-cyan.yang@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent d5ca02b2

arch/riscv/include/asm/vendor_extensions/sifive.h

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#define RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD		0

#define RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ		1

#define RISCV_ISA_VENDOR_EXT_XSFVFNRCLIPXFQF		2

#define RISCV_ISA_VENDOR_EXT_XSFVFWMACCQQQ		3



extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_sifive;

arch/riscv/kernel/vendor_extensions/sifive.c

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
/* All SiFive vendor extensions supported in Linux */

const struct riscv_isa_ext_data riscv_isa_vendor_ext_sifive[] = {

	__RISCV_ISA_EXT_DATA(xsfvfnrclipxfqf, RISCV_ISA_VENDOR_EXT_XSFVFNRCLIPXFQF),

	__RISCV_ISA_EXT_DATA(xsfvfwmaccqqq, RISCV_ISA_VENDOR_EXT_XSFVFWMACCQQQ),

	__RISCV_ISA_EXT_DATA(xsfvqmaccdod, RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD),

	__RISCV_ISA_EXT_DATA(xsfvqmaccqoq, RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ),

};