Unverified Commit 35c0d1de authored by Sheetal's avatar Sheetal Committed by Mark Brown
Browse files

ASoC: tegra: CIF: Add Tegra264 support 



In Tegra264, the CIF register data bit positions are changed for I2S,
AMX, ADX and ADMAIF AHUB modules, as they now support a maximum of
32 channels. tegra264_set_cif API added to set the CIF for IPs supporting
32 channels.

Signed-off-by: default avatarSheetal <sheetal@nvidia.com>
Link: https://patch.msgid.link/20250512051747.1026770-4-sheetal@nvidia.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 628dafc4

sound/soc/tegra/tegra_cif.h

+26 −4
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * tegra_cif.h - TEGRA Audio CIF Programming

/* SPDX-License-Identifier: GPL-2.0-only

 * SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION. All rights reserved.

 *

 * Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.

 * tegra_cif.h - TEGRA Audio CIF Programming

 *

 */
@@ -22,6 +21,10 @@ 
#define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT		1

#define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT		0



#define TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT	11

#define TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT	14

#define TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT	19



/* AUDIO/CLIENT_BITS values */

#define TEGRA_ACIF_BITS_8			1

#define TEGRA_ACIF_BITS_16			3
@@ -62,4 +65,23 @@ static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg, 
	regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);

}



static inline void tegra264_set_cif(struct regmap *regmap, unsigned int reg,

				    struct tegra_cif_conf *conf)

{

	unsigned int value;



	value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) |

		((conf->audio_ch - 1) << TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT) |

		((conf->client_ch - 1) << TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT) |

		(conf->audio_bits << TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT) |

		(conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) |

		(conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) |

		(conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) |

		(conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) |

		(conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) |

		(conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT);



	regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);

}



#endif